DSPIC30F2020-30I/SP Microchip Technology, DSPIC30F2020-30I/SP Datasheet - Page 282
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DSPIC30F2020-30I/SP
Manufacturer Part Number
DSPIC30F2020-30I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2020-30I/SP
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC30F1010/202X
Registers
Reset......................................................................... 197, 209
Reset Sequence.................................................................. 49
Reset Timing Characteristics ............................................ 246
Reset Timing Requirements.............................................. 247
Resets
RTSP Operation.................................................................. 82
DS70178C-page 280
ADCON ..................................................................... 171
ADCPC@ .................................................................. 179
ADCPC0 ................................................................... 175
ADCPC1 ................................................................... 177
ADPCFG ................................................................... 174
ADSTAT .................................................................... 173
ALTDTRx .................................................................. 115
CMPCONx ................................................................ 193
CMPDACx................................................................. 194
DTRx ......................................................................... 114
FCLCONx ................................................................. 117
FOSC ........................................................................ 204
FOSCSEL ................................................................. 203
IEC1 ............................................................................ 61
IEC2 ............................................................................ 62
IFS1 ............................................................................ 57
IFS2 ............................................................................ 58
IFSO............................................................................ 55
INTCON1 .................................................................... 52
INTCON2 .................................................................... 54
INTTREG .................................................................... 74
IOCONx .................................................................... 116
IPC0 ............................................................................ 63
IPC1 ............................................................................ 64
IPC10 .......................................................................... 73
IPC2 ............................................................................ 65
IPC3 ............................................................................ 66
IPC4 ............................................................................ 67
IPC5 ............................................................................ 68
IPC6 ............................................................................ 69
IPC7 ............................................................................ 70
IPC8 ............................................................................ 71
IPC9 ............................................................................ 72
LEBCONx ................................................................. 120
LFSR ......................................................................... 202
MDC .......................................................................... 112
OSCCON .................................................................. 199
OSCTUN ................................................................... 201
OSCTUN2 ................................................................. 202
PHASEx .................................................................... 114
PTCON ..................................................................... 110
PTPER ...................................................................... 111
PWMCONx ............................................................... 112
SEVTCMP................................................................. 111
SPIxCON1 (SPIx Control 1) ...................................... 150
SPIxCON2 (SPIx Control 2) ...................................... 151
SPIxSTAT (SPIx Status and Control) ....................... 149
TRGCONx................................................................. 115
TRIGx........................................................................ 119
U1MODE................................................................... 164
U1STA ...................................................................... 166
Reset Sources ............................................................ 49
POR .......................................................................... 211
POR with Long Crystal Start-up Time ....................... 212
POR, Operating without FSCM and PWRT .............. 212
Preliminary
S
Sales and Support ............................................................ 282
Serial Peripheral Interface (SPI) ....................................... 145
Simple Capture Event Mode
Simple OC/PWM Mode Timing Requirements ................. 252
Simple Output Compare Match Mode .............................. 102
Simple PWM Mode ........................................................... 102
Software Simulator (MPLAB SIM) .................................... 228
Software Stack Pointer, Frame Pointer .............................. 20
Special Event Compare Register (SEVTCMP) ................. 111
SPI
SPI Mode
SPI Module
SPI1 Register Map............................................................ 152
STATUS Register ............................................................... 20
Symbols used in Opcode Descriptions ............................. 220
System Integration............................................................ 197
System Integration Register Map (dsPIC30F202X).......... 218
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 87
Timer1 Register Map .......................................................... 90
Timer2 and Timer3 Selection Mode.................................. 102
Timer2/3 Module................................................................. 91
Timer2/3 Register Map ....................................................... 95
Capture Buffer Operation............................................ 98
Capture Prescaler....................................................... 98
Hall Sensor Mode ....................................................... 98
Input Capture in CPU Idle Mode................................. 99
Timer2 and Timer3 Selection Mode............................ 98
Period ....................................................................... 103
CALL Stack Frame ..................................................... 37
Master, Frame Master Connection ........................... 147
Master/Slave Connection.......................................... 147
Slave, Frame Master Connection ............................. 148
Slave, Frame Slave Connection ............................... 148
SPI1 Register Map.................................................... 152
Timing Characteristics
Timing Requirements
AC............................................................................. 240
16-bit Asynchronous Counter Mode ........................... 87
16-bit Synchronous Counter Mode ............................. 87
16-bit Timer Mode....................................................... 87
Gate Operation ........................................................... 88
Interrupt ...................................................................... 89
Operation During Sleep Mode .................................... 88
Prescaler .................................................................... 88
16-bit Timer Mode....................................................... 91
32-bit Synchronous Counter Mode ............................. 91
32-bit Timer Mode....................................................... 91
ADC Event Trigger...................................................... 94
Gate Operation ........................................................... 94
Interrupt ...................................................................... 94
Operation During Sleep Mode .................................... 94
Timer Prescaler .......................................................... 94
Master Mode (CKE = 0).................................... 254
Master Mode (CKE = 1).................................... 255
Slave Mode (CKE = 1).............................. 256, 257
Master Mode (CKE = 0).................................... 254
Master Mode (CKE = 1).................................... 255
Slave Mode (CKE = 0)...................................... 256
Slave Mode (CKE = 1)...................................... 258
© 2006 Microchip Technology Inc.