PIC18F458-I/PTG Microchip Technology, PIC18F458-I/PTG Datasheet - Page 389
![IC MCU FLASH 16KX16 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F458-I/PTG
Manufacturer Part Number
PIC18F458-I/PTG
Description
IC MCU FLASH 16KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18F458-I/PTG
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18LF242-ISO PDF datasheet #2
- PIC18F248-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- Current page: 389 of 402
- Download datasheet (7Mb)
INDEX
A
A/D .................................................................................... 241
Absolute Maximum Ratings .............................................. 329
AC (Timing) Characteristics .............................................. 341
Access Bank ....................................................................... 54
ACKSTAT ......................................................................... 173
ACKSTAT Status Flag ...................................................... 173
ADCON0 Register............................................................. 241
ADCON1 Register............................................................. 241
ADDLW ............................................................................. 287
Addressable Universal Synchronous Asynchronous
ADDWF ............................................................................. 287
ADDWFC .......................................................................... 288
ADRESH Register............................................................. 241
ADRESH/ADRESL Registers ........................................... 243
ADRESL Register ............................................................. 241
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................. 288
ANDWF ............................................................................. 289
Assembler
Associated Registers ................................................ 192, 197
B
Bank Select Register (BSR)................................................ 54
Baud Rate Generator ........................................................ 169
BC ..................................................................................... 289
BCF ................................................................................... 290
BF ..................................................................................... 173
BF Status Flag .................................................................. 173
© 2006 Microchip Technology Inc.
A/D Converter Flag (ADIF Bit) .................................. 243
A/D Converter Interrupt, Configuring ........................ 244
Acquisition Requirements ......................................... 244
Acquisition Time........................................................ 245
ADCON0 Register..................................................... 241
ADCON1 Register..................................................... 241
ADRESH Register..................................................... 241
ADRESH/ADRESL Registers ................................... 243
ADRESL Register ..................................................... 241
Analog Port Pins, Configuring................................... 246
Associated Registers Summary................................ 248
Calculating the Minimum Required
Configuring the Module............................................. 244
Conversion Clock (T
Conversion Status (GO/DONE Bit) ........................... 243
Conversion T
Conversions .............................................................. 247
Minimum Charging Time........................................... 245
Result Registers........................................................ 247
Selecting the Conversion Clock ................................ 246
Special Event Trigger (CCP)..................................... 126
Special Event Trigger (ECCP) .......................... 133, 248
T
T
Use of the ECCP Trigger .......................................... 248
Parameter Symbology .............................................. 341
GO/DONE Bit............................................................ 243
Receiver Transmitter. See USART.
MPASM Assembler................................................... 323
AD
AD
vs. Device Operating Frequencies
vs. Device Operating
Acquisition Time ............................................... 245
(For Extended, LF Devices) (table)................... 246
Frequencies (table) ........................................... 246
AD
Cycles............................................. 248
AD
) ............................................ 246
Block Diagrams
BN..................................................................................... 290
BNC .................................................................................. 291
BNN .................................................................................. 291
BNOV ............................................................................... 292
BNZ .................................................................................. 292
BOR. See Brown-out Reset.
BOV .................................................................................. 295
BRA .................................................................................. 293
BRG. See Baud Rate Generator.
Brown-out Reset (BOR).............................................. 26, 265
A/D............................................................................ 243
Analog Input Model........................................... 244, 253
Baud Rate Generator ............................................... 169
CAN Buffers and Protocol Engine ............................ 200
CAN Receive Buffer ................................................. 230
CAN Transmit Buffer ................................................ 227
Capture Mode Operation .......................................... 125
Comparator I/O Operating Modes ............................ 250
Comparator Output................................................... 252
Comparator Voltage Reference
Compare (CCP Module) Mode Operation ................ 126
Enhanced PWM........................................................ 134
Interrupt Logic............................................................. 78
Low-Voltage Detect (LVD)........................................ 260
Low-Voltage Detect with External Input.................... 260
MSSP (I
MSSP (I
MSSP (SPI Mode) .................................................... 143
On-Chip Reset Circuit................................................. 25
OSC2/CLKO/RA6 Pin................................................. 94
PIC18F248/258 Architecture ........................................ 8
PIC18F448/458 Architecture ........................................ 9
PLL ............................................................................. 19
PORTC (Peripheral Output Override)....................... 100
PORTD and PORTE (Parallel Slave Port)................ 107
PORTD in I/O Port Mode.......................................... 102
PORTE ..................................................................... 104
PWM (CCP Module) ................................................. 128
RA3:RA0 and RA5 Pins.............................................. 94
RA4/T0CKI Pin ........................................................... 94
RB1:RB0 Pins............................................................. 97
RB2/CANTX/INT2 Pin ................................................ 98
RB3/CANRX Pin......................................................... 98
RB7:RB4 Pins............................................................. 97
Reads from Flash Program Memory .......................... 69
Table Read Operation ................................................ 65
Table Write Operation ................................................ 66
Table Writes to Flash Program Memory ..................... 71
Timer0 in 16-bit Mode............................................... 110
Timer0 in 8-bit Mode................................................. 110
Timer1 ...................................................................... 114
Timer1 (16-bit Read/Write Mode) ............................. 114
Timer2 ...................................................................... 118
Timer3 ...................................................................... 120
Timer3 (16-bit Read/Write Mode) ............................. 120
USART Receive ....................................................... 191
USART Transmit ...................................................... 189
Voltage Reference.................................................... 256
Watchdog Timer ....................................................... 273
Output Buffer Example ..................................... 257
2
2
C Master Mode)......................................... 167
C Mode)..................................................... 152
PIC18FXX8
DS41159E-page 387
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