PIC18F458T-I/PT Microchip Technology, PIC18F458T-I/PT Datasheet - Page 186

• Manufacturer Part Number: PIC18F458T-I/PT
• Description: IC MCU FLASH 16KX16 W/CAN 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 18-2:
DS41159E-page 184
PIC18FXX8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RCSTA: RECEIVE STATUS AND CONTROL REGISTER
SPEN: Serial Port Enable bit
1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins)
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN: Single Receive Enable bit
Asynchronous mode:
Don’t care.
Synchronous mode – Master:
1 = Enables single receive
0 = Disables single receive (this bit is cleared after reception is complete)
Synchronous mode – Slave:
Unused in this mode.
CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables continuous receive
0 = Disables continuous receive
Synchronous mode:
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive
ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):
1 = Enables address detection, enables interrupt and load of the receive buffer when RSR<8>
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit
FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error
RX9D: 9th bit of Received Data
Can be address/data bit or a parity bit.
bit 7
0 = Serial port disabled
Legend:
R = Readable bit
-n = Value at POR
R/W-0
SPEN
is set
R/W-0
RX9
R/W-0
SREN
W = Writable bit
‘1’ = Bit is set
R/W-0
CREN
ADDEN
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FERR
R-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
OERR
R-0
RX9D
R-x
bit 0