AT90USB1287-MUR Atmel, AT90USB1287-MUR Datasheet - Page 39
![MCU AVR 128K FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90USB1287-MUR
Manufacturer Part Number
AT90USB1287-MUR
Description
MCU AVR 128K FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet
1.AT90USB646-MU.pdf
(461 pages)
Specifications of AT90USB1287-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT90USBx
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525, ATAVRQTOUCHX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6. System Clock and Clock Options
6.1
6.1.1
6.1.2
6.1.3
7593K–AVR–11/09
Clock Systems and their Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
I/O
Figure 6-1
need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes, as described in
ment and Sleep Modes” on page
Figure 6-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART.
The I/O clock is also used by the External Interrupt module, but note that some external inter-
rupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O
clock is halted. Also, TWI address recognition is handled in all sleep modes.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
CPU
FLASH
PLL Clock
USB PLL
Prescaler
USB
presents the principal clock systems in the AVR and their distribution. All of the clocks
X24
clk
clk
Pllin (2MHz)
USB (48MHz)
Clock Distribution
Asynchronous
Timer/Counter
Timer/Counter
Oscillator
51. The clock systems are detailed below.
General I/O
Modules
clk
clk
ASY
Oscillator
I/O
Crystal
Source clock
System Clock
Control Unit
AVR Clock
Multiplexer
Prescaler
Clock
ADC
External Clock
clk
ADC
CPU Core
clk
clk
Reset Logic
CPU
FLASH
AT90USB64/128
Watchdog clock
Watchdog
Oscillator
Watchdog Timer
RAM
“Power Manage-
Calibrated RC
Flash and
EEPROM
Oscillator
39
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