DSPIC30F6015-20E/PT Microchip Technology, DSPIC30F6015-20E/PT Datasheet - Page 52
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DSPIC30F6015-20E/PT
Manufacturer Part Number
DSPIC30F6015-20E/PT
Description
IC DSPIC MCU/DSP 144K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F6015-30IPT.pdf
(232 pages)
4.DSPIC30F6015-30IPT.pdf
(14 pages)
5.DSPIC30F6015-30IPT.pdf
(12 pages)
6.DSPIC30F6015-30IPT.pdf
(18 pages)
Specifications of DSPIC30F6015-20E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
52
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164315 - MODULE SKT MPLAB PM3 44TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
DSPIC30F6015-20E/PT
Manufacturer:
MICROCHIP
Quantity:
1 143
Company:
Part Number:
DSPIC30F6015-20E/PT
Manufacturer:
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Quantity:
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Company:
Part Number:
DSPIC30F6015-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6015-20E/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
11.12 Reading Data Memory
The procedure for reading data memory is similar to
that of reading code memory, except that 16-bit data
words are read instead of 24-bit words. Since less data
is read in each operation, only working registers
W0:W3 are used as temporary holding registers for the
data to be read.
TABLE 11-12: SERIAL INSTRUCTION EXECUTION FOR READING DATA MEMORY
DS70102K-page 52
Step 1: Exit the Reset vector.
0000
0000
0000
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
0000
0000
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Step 4: Output W0:W5 using the VISI register and REGOUT command.
0000
0000
0001
0000
0000
0000
0001
0000
0000
0000
0001
0000
0000
0000
0001
0000
Step 5: Reset device internal PC.
0000
0000
Step 6: Repeat steps 3-5 until all desired data memory is read.
Command
(Binary)
(Hexadecimal)
040100
040100
000000
2007F0
880190
2xxxx6
EB0380
000000
BA1BB6
000000
000000
BA1BB6
000000
000000
BA1BB6
000000
000000
BA1BB6
000000
000000
883C20
000000
<VISI>
000000
883C21
000000
<VISI>
000000
883C22
000000
<VISI>
000000
883C23
000000
<VISI>
000000
040100
000000
Data
GOTO 0x100
GOTO 0x100
NOP
MOV
MOV
MOV
CLR
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
MOV
NOP
Clock out contents of VISI register
NOP
MOV
NOP
Clock out contents of VISI register
NOP
MOV
NOP
Clock out contents of VISI register
NOP
MOV
NOP
Clock out contents of VISI register
NOP
GOTO 0x100
NOP
#0x7F, W0
W0, TBLPAG
#<SourceAddress15:0>, W6
W7
W0, VISI
W1, VISI
W2, VISI
W3, VISI
Table 11-12
reading data memory. Note that the TBLPAG register is
hard-coded to 0x7F (the upper byte address of all
locations of data memory).
Description
shows the ICSP programming details for
© 2010 Microchip Technology Inc.