PIC18F8722-E/PT Microchip Technology, PIC18F8722-E/PT Datasheet - Page 329
PIC18F8722-E/PT
Manufacturer Part Number
PIC18F8722-E/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.DV164136.pdf
(6 pages)
3.DV164136.pdf
(446 pages)
4.PIC18F8627T-IPT.pdf
(44 pages)
5.PIC18LF6627-IPT.pdf
(16 pages)
6.PIC18F8722-EPT.pdf
(448 pages)
Specifications of PIC18F8722-E/PT
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
70
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
70
Eeprom Memory Size
1024Byte
Ram Memory Size
3936Byte
Cpu Speed
40MHz
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8722-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- DV164136 PDF datasheet #2
- DV164136 PDF datasheet #3
- PIC18F8627T-IPT PDF datasheet #4
- PIC18LF6627-IPT PDF datasheet #5
- PIC18F8722-EPT PDF datasheet #6
- Current page: 329 of 446
- Download datasheet (7Mb)
26.1.1
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2008 Microchip Technology Inc.
Q Cycle Activity:
Note:
Before Instruction
After Instruction
Decode
W
W
Q1
symbolic addressing. If a label is used, the instruction format then becomes: {label} instruction argument(s).
STANDARD INSTRUCTION SET
All PIC18 instructions may take an optional label argument preceding the instruction mnemonic for use in
=
=
10h
25h
literal ‘k’
ADD Literal to W
ADDLW
0 ≤ k ≤ 255
(W) + k → W
N, OV, C, DC, Z
The contents of W are added to the
8-bit literal ‘k’ and the result is placed in
W.
1
1
ADDLW
Read
0000
Q2
15h
k
1111
Process
Data
Q3
kkkk
Write to
Q4
W
kkkk
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
PIC18F8722 FAMILY
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
ADD W to f
ADDWF
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) + (f) → dest
N, OV, C, DC, Z
Add W to register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
ADDWF
Read
0010
Q2
17h
0C2h
0D9h
0C2h
f {,d {,a}}
01da
REG, 0, 0
Process
Data
Q3
DS39646C-page 327
ffff
destination
Write to
Q4
ffff
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