ATMEGA128-16MUR Atmel, ATMEGA128-16MUR Datasheet - Page 314

MCU AVR 128KB FLASH 16MHZ 64QFN

ATMEGA128-16MUR

Manufacturer Part Number
ATMEGA128-16MUR
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Virtual Flash Page
Read Register
Programming
Algorithm
314
ATmega128
Figure 150. Virtual Flash Page Load Register
The Virtual Flash Page Read Register is a virtual scan chain with length equal to the number of
bits in one Flash page plus 8. Internally the Shift Register is 8-bit, and the data are automatically
transferred from the Flash data page byte by byte. The first eight cycles are used to transfer the
first byte to the internal Shift Register, and the bits that are shifted out during these 8 cycles
should be ignored. Following this initialization, data are shifted out starting with the LSB of the
first instruction in the page and ending with the MSB of the last instruction in the page. This pro-
vides an efficient way to read one full Flash page to verify programming.
Figure 151. Virtual Flash Page Read Register
All references below of type “1a”, “1b”, and so on, refer to
TDO
TDO
TDI
TDI
D
A
A
D
A
A
T
T
machine
machine
State
State
STROBES
STROBES
ADDRESS
ADDRESS
Table
EEPROM
EEPROM
Lock Bits
Lock Bits
Fuses
Fuses
Flash
Flash
130.
2467V–AVR–02/11

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