ATMEGA644P-A15MZ Atmel, ATMEGA644P-A15MZ Datasheet - Page 335

• Manufacturer Part Number: ATMEGA644P-A15MZ
• Description: MCU AVR 64KB FLASH 16MHZ 44QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA644P-A15MZ

• Package / Case: 44-VQFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 32
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 26-7.
Notes:
7674F–AVR–09/09
Symbol
t
t
t
t
t
t
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. Values indicated represent typical data from design simulation.
2. Required only for fSCL > 100 kHz.
3. Cb = capacitance of one bus line in pF.
4. fCK = CPU clock frequency
5. This requirement applies to all ATmega164P/324P/644P Two-wire Serial Interface operation. Other devices connected to the
6. The actual low period generated by the ATmega164P/324P/644P Two-wire Serial Interface is (1/fSCL - 2/fCK), thus fCK
7. The actual low period generated by the ATmega164P/324P/644P Two-wire Serial Interface is (1/fSCL - 2/fCK), thus the low
Two-wire Serial Bus need only obey the general fSCL requirement.
must be greater than 6 MHz for the low time requirement to be strictly met at fSCL = 100 kHz.
time requirement will not be strictly met for fSCL > 308 kHz when fCK = 8 MHz. Still, ATmega164P/324P/644P devices con-
nected to the bus may communicate at full speed (400 kHz) with other ATmega164P/324P/644P devices, as well as any
other device with a proper tLOW acceptance margin.
Parameter
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
2-wire Serial Bus Requirements
Figure 26-5. 2-wire Serial Bus Timing
SCL
SDA
t
SU;STA
(1)
(Continued)
t
HD;STA
t
t
of
LOW
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
HIGH
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
t
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
HD;DAT
t
LOW
ATmega164P/324P/644P
t
SU;DAT
250
100
Min
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
t
SU;STO
t
r
3.45
Max
0.9
–
–
–
–
–
–
–
–
–
–
t
BUF
Units
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
335