ATMEGA64L-8MQ Atmel, ATMEGA64L-8MQ Datasheet - Page 21
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ATMEGA64L-8MQ
Manufacturer Part Number
ATMEGA64L-8MQ
Description
IC MCU AVR 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64L-8MQ
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Changes from Rev.
2490J-03/05 to
Rev. 2490K-04/06
Changes from Rev.
2490I-10/04 to Rev.
2490J-03/05
Changes from Rev.
2490H-10/04 to
Rev. 2490I-11/04
Changes from Rev.
2490G-03/04 to
Rev. 2490H-10/04
2490QS–AVR–07/10
1. Updated
2. Added
3. Added Addresses in Register Descriptions.
4. Updated
5. Updated Register- and bit names in
6. Updated note in
7. Updated Features in
1. MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package
2. Updated
3. Updated
1. Removed “Preliminary” and TBD’s.
2. Updated
3. Updated features in
4. Updated
1. Removed references to Analog Ground, IC1/IC3 changed to ICP1/ICP3, Input Capture
2. Updated
3. Updated
4. Updated “XDIV – XTAL Divide Control Register” to
5. Updated code example in
6. Added section
7. Updated
8. Updated
9. Updated
10. Updated
11. Updated
QFN/MLF”.
page
Trigger changed to Input Capture Pin.
Table 60 on page
327,
“Resources” on page
Figure 2 on page
“SPI – Serial Peripheral Interface” on page
“Electrical Characteristics” on page 325
“Ordering Information” on page 15
“Electrical Characteristics” on page
“ATmega103 and ATmega64 Compatibility” on page
“External Memory Interface” on page 27
Table 19 on page
Figure 116 on page
“Version” on page
“DC Characteristics” on page
“Typical Characteristics” on page
Table 8 on page
Table 134 on page
“Unconnected Pins” on page
“Bit Rate Generator Unit” on page
135.
“Analog to Digital Converter” on page
“Analog to Digital Converter” on page
40,
“WDTCR – Watchdog Timer Control Register” on page
3.
52,
255.
239.
330.
8.
Table 11 on page
Table 20 on page
“USART” on page
325.
340.
70.
325.
42,
56,
Table 19 on page
“Clock Sources” on page
204.
Table 95 on page
163.
171.
230.
230.
ATmega64(L)
4.
52,
236, and
Table 132 on
38.
57.
21