PIC18LF8621-I/PT Microchip Technology, PIC18LF8621-I/PT Datasheet - Page 387

• Manufacturer Part Number: PIC18LF8621-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8621-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 70
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3840Byte
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

K
Key Features
L
LFSR ................................................................................. 299
Low-Voltage Detect........................................................... 253
Low-Voltage ICSP Programming ...................................... 274
LVD. See Low-Voltage Detect.
M
Master SSP (MSSP) Module Overview ............................ 173
Master Synchronous Serial Port (MSSP). See MSSP.
Master Synchronous Serial Port. See MSSP
Memory
Memory Maps for PIC18F6X2X/8X2X
Memory Organization
Memory Programming Requirements ............................... 334
Microcontroller Mode .......................................................... 71
Microprocessor Mode ......................................................... 71
Microprocessor with Boot Block Mode ................................ 71
Migration from High-End to
Migration from Mid-Range to
MOVF................................................................................ 299
MOVFF ............................................................................. 300
MOVLB ............................................................................. 300
MOVLW ............................................................................ 301
MOVWF ............................................................................ 301
MPLAB ASM30 Assembler, Linker, Librarian ................... 318
MPLAB ICD 2 In-Circuit Debugger ................................... 319
MPLAB ICE 2000 High-Performance
MPLAB ICE 4000 High-Performance
MPLAB Integrated Development
MPLAB PM3 Device Programmer .................................... 319
MPLINK Object Linker/MPLIB Object Librarian ................ 318
MSSP ................................................................................ 173
 2005 Microchip Technology Inc.
Easy Migration .............................................................. 7
Expanded Memory........................................................ 7
External Memory Interface............................................ 7
Other Special Features ................................................. 7
Characteristics .......................................................... 333
Converter Characteristics ......................................... 333
Effects of a Reset...................................................... 257
Operation .................................................................. 256
Typical Application .................................................... 253
Mode Memory Access ................................................ 40
Program Memory Modes ............................................ 41
Data Memory .............................................................. 47
Program Memory ........................................................ 39
Enhanced Devices .................................................... 379
Enhanced Devices .................................................... 378
Universal In-Circuit Emulator .................................... 319
Universal In-Circuit Emulator .................................... 319
Environment Software............................................... 317
ACK Pulse......................................................... 186, 187
Clock Stretching........................................................ 192
Clock Synchronization and the
Current Consumption........................................ 257
During Sleep ..................................................... 257
Reference Voltage Set Point ............................ 257
Modes ................................................................. 39
10-Bit Slave Receive Mode (SEN = 1).............. 192
10-Bit Slave Transmit Mode ............................. 192
7-Bit Slave Receive Mode (SEN = 1)................ 192
7-Bit Slave Transmit Mode ............................... 192
CKP bit (SEN = 1)............................................. 193
PIC18F6525/6621/8525/8621
MSSP Module
MULLW............................................................................. 302
MULWF............................................................................. 302
N
NEGF................................................................................ 303
NOP .................................................................................. 303
O
Oscillator Configuration ...................................................... 21
Oscillator Selection ........................................................... 259
Oscillator, Timer1.............................................. 135, 137, 145
Oscillator, Timer3.............................................................. 143
Oscillator, WDT................................................................. 267
Control Registers (general) ...................................... 173
Enabling SPI I/O ....................................................... 177
I
Module Operation ..................................................... 186
Operation.................................................................. 176
Slave Mode............................................................... 186
SPI Master Mode...................................................... 178
SPI Mode.................................................................. 173
SPI Slave Mode........................................................ 179
SSPBUF ................................................................... 178
SSPSR ..................................................................... 178
TMR2 Output for Clock Shift............................. 141, 142
TMR4 Output for Clock Shift..................................... 148
Typical Connection ................................................... 177
SPI Master/Slave Connection................................... 177
EC............................................................................... 21
ECIO........................................................................... 21
ECIO+PLL .................................................................. 21
ECIO+SPLL ................................................................ 21
HS............................................................................... 21
HS+PLL ...................................................................... 21
HS+SPLL.................................................................... 21
LP ............................................................................... 21
RC .............................................................................. 21
RCIO........................................................................... 21
XT ............................................................................... 21
2
C Mode .................................................................. 182
Acknowledge Sequence Timing ....................... 206
Baud Rate Generator ....................................... 199
Bus Collision
Bus Collision During a Start Condition ............. 208
Bus Collision During a Stop Condition.............. 211
Clock Arbitration ............................................... 200
Effect of a Reset ............................................... 207
I
Master Mode..................................................... 197
Multi-Master Communication, Bus
Multi-Master Mode............................................ 207
Registers .......................................................... 182
Sleep Operation ............................................... 207
Stop Condition Timing ...................................... 206
Addressing ....................................................... 186
Reception ......................................................... 187
Transmission .................................................... 187
2
C Clock Rate w/BRG ..................................... 199
During a Repeated
Reception ................................................. 203
Repeated Start Condition Timing ............. 202
Start Condition Timing.............................. 201
Transmission ............................................ 203
Collision and Arbitration ........................... 207
Start Condition.................................. 210
DS39612B-page 385