ATSAM3U2EA-CU Atmel, ATSAM3U2EA-CU Datasheet - Page 39
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ATSAM3U2EA-CU
Manufacturer Part Number
ATSAM3U2EA-CU
Description
IC MCU 32BIT 128KB FLSH 144LFBGA
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-CU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
10.6
6430DS–ATARM–28-Mar-11
Power Management Controller
The Power Management Controller provides all the clock signals to the system. It provides:
The Supply Controller selects between the 32 kHz RC oscillator or the crystal oscillator. The
unused oscillator is disabled automatically so that power consumption is optimized.
By default, at startup the chip runs out of the Master Clock using the Fast RC Oscillator running
at 4 MHz.
Figure 10-3.
The SysTick calibration value is fixed at 10500, which allows the generation of a time base of
1 ms with SystTick clock to 10.5 MHz (max HCLK/8).
• the Processor Clock HCLK
• the Free running processor clock FCLK
• the Cortex SysTick external clock
• the Master Clock MCK, in particular to the Matrix and the memory interfaces
• the USB Device HS Clock UDPCK
• independent peripheral clocks, typically at the frequency of MCK
• three programmable clock outputs: PCK0, PCK1 and PCK2
PLLBCK
MAINCK
PLLACK
SLCK
Power Management Controller Block Diagram
Master Clock Controller
MAINCK
PLLACK
PLLBCK
HSCK
SLCK
/1,/2,/4,...,/64
Prescaler
Programmable Clock Controller
USB Clock Controller
/1,/2,/4,...,/64
Prescaler
Sleep Mode
ON/OFF
Clock Controller
Processor
Controller
ON/OFF
Divider
Clock
Peripherals
ON/OFF
/8
SAM3U Series
HCK
int
SystTick
FCLK
MCK
periph_clk[..]
pck[..]
UDPCK
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