DSPIC30F6014-20E/PF Microchip Technology, DSPIC30F6014-20E/PF Datasheet - Page 23

• Manufacturer Part Number: DSPIC30F6014-20E/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014-20E/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F601420EPF

38. Module: QEI
39. Module: PWM
TABLE 5:
© 2010 Microchip Technology Inc.
0x0100
0x0200
Note 1:
OVDCON
For this release of silicon, the Quadrature Encoder
Interface (QEI) module should not be operated in
the Reset on Index Pulse mode.
Work around
None.
Affected Silicon Revisions
The input clock to the PWM time base has
prescaler options of 1:1, 1:4, 1:16 or 1:64, selected
by the PTCKPS (PTCON<3:2>) control bits. In this
release of silicon, the options 1:4, 1:16 and 1:64
may produce unexpected results when used to
generate center-aligned PWM pulses.
Work around
The prescaler should be set to the 1:1 option (i.e.,
prescaler should be disabled) in this release of
silicon when generating center-aligned PWM
pulses.
Affected Silicon Revisions
A3
A3
X
X
2:
3:
Other Motor Control PWM SFRs were initialized as follows: PTCON = 0x8002 and PWMCON1 = 0x0011.
For these settings of OVDCON, the OSYNC bit (PWMCON<1>) should be cleared to ‘0’ for correct
operation.
Results are shown here for the PWM1H and PWM1L pins only. Similar results will be observed for any
other pair of complementary output pins (PWM2H/L, PWM3H/L and PWM4H/L) and any other chosen duty
cycle.
B1
B1
Dead Time
Enabled
OUTPUT OVERRIDE: EXPECTED VS. OBSERVED OPERATION
Yes
Yes
B2
B2
PWM1H PWM1L PWM1H PWM1L
Expected Output
PWM
Low
PWM
Low
Observed Output
Low
Low
dsPIC30F6011/6012/6013/6014
Low
Low
40. Module: PWM
Output on PWM1L pin is shortened by dead time
Output on PWM1H pin is shortened by dead time
The output override function of the PWM module,
controlled by the OVDCON register and the
OSYNC bit (PWMCON2<1>), produces unex-
pected results on the output pins in certain cases
when the module is used in Complementary mode.
These cases are shown in Table 5. Future
releases of silicon will operate as shown in the
“Expected Output” columns in Table 5.
Work around
None.
Affected Silicon Revisions
A3
X
B1
B2
Comments
(1,2,3)
DS80456D-page 23