ATMEGA2560V-8AU Atmel, ATMEGA2560V-8AU Datasheet - Page 33

• Manufacturer Part Number: ATMEGA2560V-8AU
• Description: IC AVR MCU 256K 8MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA2560V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• A/d Inputs: 16-Channel, 10-Bit
• Cpu Speed: 8 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 86
• Interface: 2-Wire/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 100-pin TQFP
• Programmable Memory: 256K Bytes
• Timers: 2-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10. Datasheet Revision History
10.1
10.2
10.3
2549LS–AVR–08/07
Rev. 2549L-08/07
Rev. 2549K-01/07
Rev. 2549J-09/06
Please note that the referring page numbers in this section are referring to this document.The
referring revision in this section are referring to the document revision.
1.
2.
3.
4.
5.
6.
7.
8.
9.
1.
2.
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4.
5.
6:
7.
8.
9.
10.
1.
2.
3.
Updated note in
Updated
46.
Updated typos in
Updated
Updated
Added
Updated
Updated
Updated ordering code in
Updated
Updated
Updated
Updated
Updated Assembly code example in
after setting the ACBG bit or enabling the ADC, the user must always
allow the reference to start up before the output from the Analog Compar-
ator or ADC is used. To reduce power consumption in Power-down mode,
the user can avoid the three conditions above to ensure that the reference
is turned off before entering Power-down mode” on page
Updated
Updated Bit description in
on page
Updated code example in
Updated
Updated
Updated
Updated code example in
Boot Section” on page
Updated
“System and Reset Characteristics” on page
116.
Table 10-3 on page
“Clock Characteristics” on page
“External Clock Drive” on page
“SPI Timing Characteristics” on page
“ADC Characteristics – Preliminary Data” on page
Table 1-1 on page
“Pin Descriptions” on page
“Stack Pointer” on page
“Bit 1 – EEPE: EEPROM Programming Enable” on page
“EIMSK – External Interrupt Mask Register” on page
Figure 26-8 on page
“DC Characteristics” on page
“Calibrated Internal RC Oscillator” on page
“Timer/Counter Prescaler” on page
Table 10-10 on page
“DC Characteristics” on page
109.
ATmega640/1280/1281/2560/2561
“ATmega640” on page
“USART Initialization” on page
“Moving Interrupts Between Application and
“PCIFR – Pin Change Interrupt Flag Register”
3.
42,
284.
Table 10-5 on page
15.
“Thus, when the BOD is not enabled,
7.
47.
370.
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374.
187.
377.
370.
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43,
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Table 10-8 on page
211.
63.
379.
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35.
25