ST7FLITEU09B3 STMicroelectronics, ST7FLITEU09B3 Datasheet - Page 46
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ST7FLITEU09B3
Manufacturer Part Number
ST7FLITEU09B3
Description
IC MCU 8BIT 2K FLASH 8-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITEU05M6.pdf
(139 pages)
Specifications of ST7FLITEU09B3
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
ST7FLITEUx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
ICC
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Details
Interrupts
Note:
8.4
Note:
8.4.1
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1
2
3
These 8 bits can be written only when the I bit in the CC register is set.
Changing the sensitivity of a particular external interrupt clears this pending interrupt. This
can be used to clear unwanted pending interrupts. Refer to section “External interrupt
function” on page 61.
IS4[1:0] = 01 is the only safe configuration to avoid spurious interrupt in Halt and AWUFH
modes.
System integrity management (SI)
The system integrity management block contains the low voltage detector (LVD) and
Auxiliary Voltage Detector (AVD) functions. It is managed by the SICSR register.
A reset can also be triggered following the detection of an illegal opcode or prebyte code.
Refer to
Low voltage detector (LVD)
The Low Voltage Detector function (LVD) generates a static reset when the V
voltage is below a V
as the power-down keeping the ST7 in reset.
The V
for power-on in order to avoid a parasitic reset when the MCU starts running and sinks
current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when V
●
●
The LVD function is illustrated in
The voltage threshold can be configured by option byte to be low, medium or high. See
Section 15.1 on page
Provided the minimum V
the MCU can only be in two modes:
●
●
In these conditions, secure operation is always ensured for the application without the need
for external reset hardware.
During a low voltage detector Reset, the RESET pin is held low, thus permitting the MCU to
reset other devices.
V
V
under full software control
in static safe reset
IT-(LVD)
IT+(LVD)
IT-(LVD)
Section 12.2.1 on page 92
reference value for a voltage drop is lower than the V
when V
when V
IT-(LVD)
DD
DD
127.
is falling
DD
is rising
reference value. This means that it secures the power-up as well
value (guaranteed for the oscillator frequency) is above V
Figure
for further details.
19.
DD
is below:
ST7LITEU05 ST7LITEU09
IT+(LVD)
reference value
DD
supply
IT-(LVD)
,