STR752FR1T6 STMicroelectronics, STR752FR1T6 Datasheet - Page 64

• Manufacturer Part Number: STR752FR1T6
• Description: MCU 32BIT 128K FLASH 64-LFBGA
• Manufacturer: STMicroelectronics
• Series: STR7r

Specifications of STR752FR1T6

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, SPI, SSI, SSP, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LFBGA
• Processor Series: STR752x
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SPI, SSI, SSP, USB
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, KSDK-STR750-PLUS, MCBSTR750, MCBSTR750U, MCBSTR750UME, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: STR750-MCKIT, STR750-SK/HIT, STR750-SK/IAR, STR750-SK/KEIL, STR750-SK/RAIS, STR750-EVAL, STX-PRO/RAIS, STX-RLINK, STR79-RVDK/CPP, STR79-RVDK, STR79-RVDK/UPG
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• For Use With: MCBSTR750UME - BOARD EVAL MCBSTR750 + ULINK-MEMCBSTR750U - BOARD EVAL MCBSTR750 + ULINK2497-5754 - KIT STARTER IAR STR750497-5753 - KIT STARTER KEIL FOR STR7/STR9497-5752 - KIT STARTER IAR FOR STR7/STR9497-5748 - BOARD EVALUATION FOR STR750XF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical parameters
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Figure 31. TI configuration - master mode, single transfer
Figure 32. TI configuration - master mode, continuous transfer
NSS
SCK
MOSI
MISO
MOSI
OUTPUT
OUTPUT
MISO
INPUT
SCK
NSS
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
DONT CARE
DONT CARE
1 OR 0
1 OR 0
trigger sample
MSB OUT
MSB IN
edge
trigger
trigger sample
t
t
t
su(MISO)
SCKQV
w(SCKH)
t
c(SCK)
sample
t
f(SCK)
FRAME 1
edge
MSB IN
MSB OUT
trigger sample
t
c(SCK)
t
w(SCKL)
t
h(MISO)
edge
trigger
t
r(SCK)
trigger
t
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
SCKQX
sample
sample
edge
trigger sample
LSB OUT
LSB IN
edge
trigger
t
c(SCK)
trigger sample
MSB OUT
MSB IN
sample
LSB IN
edge
LSB OUT
trigger sample
FRAME 2
trigger sample
DONT CARE
LSB OUT
LSB IN
DONT CARE