Z86E3412VSC Zilog, Z86E3412VSC Datasheet - Page 59

• Manufacturer Part Number: Z86E3412VSC
• Description: IC MICROCONTROLLER 16K 28-PLCC
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E3412VSC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: EBI/EMI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 237 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-PLCC
• Data Bus Width: 8 bit
• Data Ram Size: 237 B
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2 bit
• Operating Supply Voltage: 3.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No
• Other names: 269-1039

PS022901-0508
When more than one interrupt is pending, priorities are resolved by a programmable prior-
ity encoder that is controlled by the Interrupt Priority Register (IPR). An interrupt machine
cycle is activated when an interrupt request is granted. Thus, disabling all subsequent
interrupts, saves the Program Counter and Status Flags, and then branches to the program
memory vector location reserved for that interrupt. All interrupts are vectored through
locations in the program memory. This memory location and the next byte contain the 16-
bit starting address of the interrupt service routine for that particular interrupt request.
To accommodate polled interrupt systems, interrupt inputs are masked and the interrupt
request register is polled to determine which of the interrupt requests need service.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 may be rising, falling or both edge trig-
gered, and are programmable by the user. The software may poll to identify the state of the
pin.
Programming bits for the Interrupt Edge Select are located in bits D7 and D6 of the IRQ
Register (R250). The configuration is shown in
Table 21. IRQ Register Configuration
Clock. The on-chip oscillator has a high-gain, parallel-resonant amplifier for connection
to a crystal, RC, ceramic resonator, or any suitable external clock source (XTAL1 = Input,
XTAL2 = Output). The crystal should be AT cut, 10 kHz to 16 MHz max, with a series
resistance (RS) less than or equal to 100 Ω.
The crystal should be connected across XTAL1 and XTAL2 using the vendor’s recom-
mended capacitor values from each pin directly to device pin Ground. The RC oscillator
option can be selected in the programming mode. The RC oscillator configuration must be
an external resistor connected from XTAL1 to XTAL2, with a frequency-setting capacitor
from XTAL1 to Ground
D7
0
0
1
1
Notes
1. F = Falling Edge
2. R = Rising Edge
IRO
D6
0
1
0
1
P31
F
F
R
R/F
(Table
Interrupt Edge
29).
P32
F
R
F
R/F
Table
CMOS Z8
21.
®
Product Specification
OTP Microcontrollers
Electrical Characteristics
55