STM32F107RCT6 STMicroelectronics, STM32F107RCT6 Datasheet - Page 7

MCU ARM 256KB FLASH MEM 64-LQFP

STM32F107RCT6

Manufacturer Part Number
STM32F107RCT6
Description
MCU ARM 256KB FLASH MEM 64-LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F107RCT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, SPI, UART/USART, USB OTG
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
51
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
STM32F107x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN, I2C, SPI, USART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
51
Number Of Timers
10
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit x 2, 16 Channel
On-chip Dac
12 bit x 2, 2 Channel
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
64KB
# I/os (max)
51
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
LQFP
For Use With
497-10591 - DAUGHTER BOARD FOR STM32497-10064 - EVAL BOARD497-9040 - DEV KIT FOR STM32497-9041 - DEV KIT FOR STM32497-9042 - DEV KIT FOR STM32497-9043 - DEV KIT FOR STM32497-8924 - EVAL BOARD FOR STM32F107VCT497-8853 - BOARD DEMO STM32 UNIV USB-UUSCI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-8914

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STM32F105xx, STM32F107xx
List of figures
Figure 1.
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Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
STM32F105xx and STM32F107xx connectivity line block diagram . . . . . . . . . . . . . . . . . 12
STM32F105xxx and STM32F107xxx connectivity line BGA100 ballout top view. . . . . . . . 23
STM32F105xxx and STM32F107xxx connectivity line LQFP100 pinout . . . . . . . . . . . . . . 24
STM32F105xxx and STM32F107xxx connectivity line LQFP64 pinout . . . . . . . . . . . . . . . 25
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Typical current consumption on V
different V
Typical current consumption in Stop mode with regulator in Run mode
versus temperature at different V
Typical current consumption in Stop mode with regulator in Low-power
mode versus temperature at different V
Typical current consumption in Standby mode versus temperature at
different V
High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Standard I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Standard I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5 V tolerant I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
5 V tolerant I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
I
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
SPI timing diagram - slave mode and CPHA = 1
SPI timing diagram - master mode
I
I
USB OTG FS timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . 68
Ethernet SMI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Ethernet RMII timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Ethernet MII timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Power supply and reference decoupling (V
Power supply and reference decoupling (V
12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array package
outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Recommended PCB design rules (0.80/0.75 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . . . 81
LQFP100, 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Recommended footprint
LQFP64 – 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
2
2
2
C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
S slave timing diagram (Philips protocol)
S master timing diagram (Philips protocol)
BAT
DD
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Doc ID 15274 Rev 5
DD
BAT
(1)
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
with RTC on vs. temperature at
DD
(1)
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
REF+
REF+
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
(1)
not connected to V
connected to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
DDA
DDA
). . . . . . . . . . . . . . . . . 75
). . . . . . . . . . . . . . 75
List of figures
7/101

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