CY8CLED16P01-28PVXI Cypress Semiconductor Corp, CY8CLED16P01-28PVXI Datasheet - Page 32

• Manufacturer Part Number: CY8CLED16P01-28PVXI
• Description: IC PLC PSOC CMOS LED 16CH 28SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: PowerPSoC® CY8CLEDr

Specifications of CY8CLED16P01-28PVXI

• Package / Case: 28-SSOP
• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: LED, PLC, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 4x14b; D/A 4x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Low Level Output Current: 25 mA
• High Level Output Current: 10 mA
• Operating Supply Voltage: 5 V
• Maximum Supply Current: 14 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: SSOP
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.4.2 AC General Purpose IO Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40 ° C ≤ T
Table 10-14. AC GPIO Specifications
Document Number: 001-49263 Rev. *E
F
TRiseF
TFallF
TRiseS
TFallS
Symbol
GPIO
GPIO Operating Frequency
Rise Time, Normal Strong Mode, Cload = 50 pF
Fall Time, Normal Strong Mode, Cload = 50 pF
Rise Time, Slow Strong Mode, Cload = 50 pF
Fall Time, Slow Strong Mode, Cload = 50 pF
A
≤ 85 ° C. Typical parameters apply to 5V at 25 ° C and are for design guidance only.
Select
F
F
Enable
F
32K
Description
24M
Gain
32K2
PLL
PLL
32K2
F
Figure 10-3. External Crystal Oscillator Startup Timing Diagram
PLL
Figure 10-2. PLL Lock for Low Gain Setting Timing Diagram
Figure 10-4. 24 MHz Period Jitter (IMO) Timing Diagram
Figure 10-5. 32 kHz Period Jitter (ECO) Timing Diagram
1
T
OS
T
PLLSLEWLOW
Min
10
10
0
3
2
Typ
27
22
–
–
–
Jitter24M1
Jitter32k
Max
12.3
18
18
–
–
Units
MHz
ns
ns
ns
ns
24 MHz
32 kHz
Normal Strong Mode
10% - 90%
10% - 90%
10% - 90%
10% - 90%
CY8CLED16P01
Notes
Page 32 of 46
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