ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 31

• Manufacturer Part Number: ST10F273M-4TR3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F273M
5.4
5.4.1
IFlash is not fetchable when a programming operation is active: The write operation
commands must be executed from another memory (one of the on-chip RAMs or some
external memory).
Power supply drop
If during a write operation the internal low voltage supply drops below a certain internal
voltage threshold, any write operation running is suddenly interrupted and the module is
reset to Read mode. At following Power-on, the interrupted Flash write operation must be
repeated.
Flash control registers description
Flash control register 0 low (FCR0L)
The Flash Control Register 0 Low (FCR0L), together with the Flash Control Register 0 High
(FCR0H), is used to enable and to monitor all the write operations on the IFlash. The user
has no access in write mode to the Test-Flash (B0TF). Moreover, the Test-Flash block is
seen by the user in Bootstrap mode only.
Table 7.
FCR0L (0x0E 0000)
15:7
Bit
15
6
5
Warning:
DBSY1
14
Name
BSY0
-
FCR0L register description
13
Reserved. These bits must be left to their reset value (0).
Dummy Bank1 Busy
Bank0 Busy
It is a replication of the BSY0 bit: it is set whenever a write operation is on-going.
This bit is emulating the BSY1 bit of the ST10F273E device. When write
operations are on going on B0F10 and/or B0F11 blocks of the ST10F273M, this
bit will be set in order to indicate that their equivalent B1F0 or B1F1 in the
ST10F273E are busy.
This bits indicate that a write operation is running in the Bank0. It is automatically
set when bit WMS is set. When this bit is set every read access to the Bank0 will
output invalid data (software trap 009Bh), while every write access will be ignored.
At the end of the write operation or during a Program or Erase Suspend this bit is
automatically reset and Flash Bank returns to read mode. After a Program or
Erase Resume this bit is automatically set again.
12
During a Write operation, when bit LOCK of FCR0 is set, it is
forbidden to write into the Flash Control Registers.
Reserved
11
-
10
9
8
FCR
7
Function
DBSY
RO
6
1
BSY
RO
5
0
LOCK
RO
4
Internal Flash memory
3
Reserved
Reset value: 0000h
-
2
NVR
BSY
RO
1
31/182
Res
0
-