ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 33

• Manufacturer Part Number: ST10F273M-4TR3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F273M
Table 8.
1. It is forbidden to start a new Write operation with bit SUSP already set.
10:9
Bit
6:0
14
13
12
11
8
7
DSMOD
DWPG
Name
SUSP
WPG
SER
SPR
-
-
FCR0H register description (continued)
Suspend
Word program
Double word program
Sector erase
Reserved. This bit must be left to their reset value (0).
Set protection
Dummy Select Module
Reserved. These bits must be kept to their reset value (0).
This bit must be set to suspend the current Program (Word or Double Word) or
Sector Erase operation in order to read data in another part of the Flash. The
Suspend operation resets the Bank0 to normal read mode (automatically resetting
bits BSYx). When in Program Suspend, the Flash module accepts only the
following operations: Read and Program Resume. When in Erase Suspend the
module accepts only the following operations: Read, Erase Resume. To resume a
suspended operation, the WMS bit must be set again, together with the selection
bit corresponding to the operation to resume (WPG, DWPG, SER).
This bit must be set to select the Word (32 bits) Program operation in the Flash
module. The Word Program operation allows to program 0s in place of 1s. The
Flash Address to be programmed must be written in the FARH/L registers, while
the Flash Data to be programmed must be written in the FDR0H/L registers before
starting the execution by setting bit WMS. WPG bit is automatically reset at the
end of the Word Program operation.
This bit must be set to select the Double Word (64 bits) Program operation in the
Flash module. The Double Word Program operation allows to program 0s in place
of 1s. The Flash Address in which to program (aligned with even words) must be
written in the FARH/L registers, while the two Flash Data words to be programmed
must be written in the FDR0H/L registers (even word) and FDR1H/L registers (odd
word) before starting the execution by setting bit WMS. DWPG bit is automatically
reset at the end of the Double Word Program operation.
This bit must be set to select the Sector Erase operation. The Sector Erase
operation allows to erase all the Flash locations to value 0xFFFF. From 1 to all of
Bank0’s sectors (excluding Test-Flash) can be selected to be erased through bits
BxFy of FCR1H/L registers before starting the execution by setting bit WMS. It is
not necessary to preprogram the sectors to 0, because this is done automatically.
SER bit is automatically reset at the end of the Sector Erase operation.
This bit must be set to select the Set Protection operation. The Set Protection
operation allows to program 0s in place of 1s in the Flash Non-Volatile Protection
Registers. The Flash Address in which to program must be written in the FARH/L
registers, while the Flash Data to be programmed must be written in the FDR0H/L
before starting the execution by setting bit WMS. A sequence error is flagged by bit
SEQER of FER if the address written in FARH/L is not in the range 0x0E DFB0-
0x0E DFBF.
SPR bit is automatically reset at the end of the Set Protection operation.
This is a dummy SMOD bit that is maintaining software compatibility with the
ST10F273E where it must be set before every Write Operation to the IFlash.
It has no effect in the ST10F273M.
Function
Internal Flash memory
(1)
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