ST10F269Z2T3 STMicroelectronics, ST10F269Z2T3 Datasheet - Page 57

• Manufacturer Part Number: ST10F269Z2T3
• Description: MCU 16BIT 256KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269Z2T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Processor Series: ST10F26x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F269
12 - PARALLEL PORTS
12.1 - Introduction
The ST10F269 MCU provides up to 111 I/O lines
with programmable features. These capabilities
bring very flexible adaptation of this MCU to wide
range of applications.
ST10F269 has 9 groups of I/O lines gathered as
following:
– Port 0 is a 2 time 8-bit port named P0L (Low as
– Port 1 is a 2 time 8-bit port named P1L and P1H
– Port 2 is a 16-bit port
– Port 3 is a 15-bit port (P3.14 line is not imple-
– Port 4 is a 8-bit port
– Port 5 is a 16-bit port input only
– Port 6, Port 7 and Port 8 are 8-bit port
These ports may be used as general purpose
bidirectional input or output, software controlled
with dedicated registers.
For example the output drivers of six of the ports
(2, 3, 4, 6, 7, 8) can be configured (bit-wise) for
push-pull or open drain operation using ODPx
registers.
In addition, the sink and the source capability and
the rise / fall time of the transition of the signal of
some of the push-pull buffers can be programmed
to fit the driving requirements of the application
and to minimize EMI. This feature is implemented
on Port 0, 1, 2, 3, 4, 6, 7 and 8 with the control
registers POCONx. The output drivers capabilities
of ALE, RD, WR control lines are programmable
with the dedicated bits of POCON20 control
register.
The input threshold levels are programmable
(TTL/CMOS) for 5 ports (2, 3, 4, 7, 8). The logic
level of a pin is clocked into the input latch once
per state time, regardless whether the port is
configured for input or output. The threshold is
selected with the PICON register control bits.
A write operation to a port pin configured as an
input causes the value to be written into the port
output latch, while a read operation returns the
latched state of the pin itself. A read-modify-write
operation reads the value of the pin, modifies it,
and writes it back to the output latch.
Writing to a pin configured as an output
(DPx.y=‘1’) causes the output latch and the pin to
have the written value, since the output buffer is
enabled. Reading this pin returns the value of the
output latch. A read-modify-write operation reads
less significant Byte) and P0H (high as most sig-
nificant Byte)
mented)
the value of the output latch, modifies it, and
writes it back to the output latch, thus also
modifying the level at the pin.
I/O lines support an alternate function which is
detailed in the following description of each port.
12 - PARALLEL PORTS
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