MC9S08QD2MSCR Freescale Semiconductor, MC9S08QD2MSCR Datasheet - Page 149

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MC9S08QD2MSCR

Manufacturer Part Number
MC9S08QD2MSCR
Description
IC MCU 8BIT 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08QD2MSCR

Core Processor
HCS08
Core Size
8-Bit
Speed
16MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
S08QD
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
128 B
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QD4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
11.3.2
The two read-only TPM counter registers contain the high and low bytes of the value in the TPM counter.
Reading either byte (TPMxCNTH or TPMxCNTL) latches the contents of both bytes into a buffer where
they remain latched until the other byte is read. This allows coherent 16-bit reads in either order. The
coherency mechanism is automatically restarted by an MCU reset, a write of any value to TPMxCNTH or
TPMxCNTL, or any write to the timer status/control register (TPMxSC).
Reset clears the TPM counter registers.
Freescale Semiconductor
Reset
W
R
Bit 15
Timer Counter Registers (TPMxCNTH:TPMxCNTL)
1
2
0
7
The maximum frequency that is allowed as an external clock is one-fourth of the bus
frequency.
If the external clock input is shared with channel n and is selected as the TPM clock source,
the corresponding ELSnB:ELSnA control bits must be set to 0:0 so channel n does not try to
use the same pin for a conflicting function.
CLKSB:CLKSA
PS2:PS1:PS0
0:0
0:1
1:0
1:1
14
Figure 11-4. Timer Counter Register High (TPMxCNTH)
0
6
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Table 11-2. TPM Clock Source Selection
MC9S08QD4 Series MCU Data Sheet, Rev. 6
Table 11-3. Prescale Divisor Selection
Any write to TPMxCNTH clears the 16-bit counter.
13
0
5
TPM Clock Source to Prescaler Input
No clock selected (TPMx disabled)
12
0
4
External source (TPMxCLK)
Fixed system clock (XCLK)
Bus rate clock (BUSCLK)
TPM Clock Source Divided-By
11
3
0
128
16
32
64
1
2
4
8
Timer/Pulse-Width Modulator (S08TPMV2)
10
0
1,2
2
9
0
1
Bit 8
0
0
149

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