C8051T634-GM Silicon Laboratories Inc, C8051T634-GM Datasheet - Page 52
![IC MCU 2KB 20PIN QFN](/photos/12/25/122567/silicon_laboratories_inc-20-qfn_sml.jpg)
C8051T634-GM
Manufacturer Part Number
C8051T634-GM
Description
IC MCU 2KB 20PIN QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T63xr
Specifications of C8051T634-GM
Program Memory Type
OTP
Program Memory Size
2KB (2K x 8)
Package / Case
20-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T630DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1464 - KIT DEV FOR C8051T630 FAMILY
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1462-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T634-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
C8051T630/1/2/3/4/5
9. Voltage Reference Options
The Voltage reference multiplexer for the ADC is configurable to use an externally connected voltage refer-
ence, the on-chip reference voltage generator routed to the VREF pin, the unregulated power supply volt-
age (V
), or the regulated 1.8 V internal supply (see Figure 9.1). The REFSL bit in the Reference Control
DD
register (REF0CN, SFR Definition 9.1) selects the reference source for the ADC. For an external source or
the on-chip reference, REFSL should be set to 0 to select the VREF pin. To use V
as the reference
DD
source, REFSL should be set to 1. To override this selection and use the internal regulator as the reference
source, the REGOVR bit can be set to 1.
The BIASE bit enables the internal voltage bias generator, which is used by many of the analog peripherals
on the device. This bias is automatically enabled when any peripheral which requires it is enabled, and it
does not need to be enabled manually. The bias generator may be enabled manually by writing a 1 to the
BIASE bit in register REF0CN. The electrical specifications for the voltage reference circuit are given in
Table 5.11.
The C8051T630/2/4 devices also include an on-chip voltage reference circuit which consists of a 1.2 V,
temperature stable bandgap voltage reference generator and a selectable-gain output buffer amplifier. The
buffer is configured for 1x or 2x gain using the REFBGS bit in register REF0CN. On the 1x gain setting the
output voltage is nominally 1.2 V, and on the 2x gain setting the output voltage is nominally 2.4 V. The on-
chip voltage reference can be driven on the VREF pin by setting the REFBE bit in register REF0CN to a 1.
The maximum load seen by the VREF pin must be less than 200 µA to GND. Bypass capacitors of 0.1 µF
and 4.7 µF are recommended from the VREF pin to GND, and a minimum of 0.1uF is required. If the on-
chip reference is not used, the REFBE bit should be cleared to 0. Electrical specifications for the on-chip
voltage reference are given in Table 5.11.
Important Note about the VREF Pin: When using either an external voltage reference or the on-chip ref-
erence circuitry, the VREF pin should be configured as an analog pin and skipped by the Digital Crossbar.
Refer to Section “20. Port Input/Output” on page 109 for the location of the VREF pin, as well as details of
how to configure the pin in analog mode and to be skipped by the crossbar.
52
Rev. 1.0