MC9S08AC8MFJE Freescale Semiconductor, MC9S08AC8MFJE Datasheet - Page 217
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MC9S08AC8MFJE
Manufacturer Part Number
MC9S08AC8MFJE
Description
IC MCU 8BIT 8K FLASH 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AC8CFGE.pdf
(336 pages)
Specifications of MC9S08AC8MFJE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08AC8MFJE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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12.4.3
This register is used to set the prescaler and bit rate divisor for an SPI master. This register may be read or
written at any time.
Freescale Semiconductor
SPPR[2:0]
MODFEN
BIDIROE
SPISWAI
SPR[2:0]
Reset
SPC0
Field
Field
6:4
2:0
4
3
1
0
W
R
SPI Baud Rate Register (SPI1BR)
Master Mode-Fault Function Enable — When the SPI is configured for slave mode, this bit has no meaning or
effect. (The SS pin is the slave select input.) In master mode, this bit determines how the SS pin is used (refer to
Table 12-2
0 Mode fault function disabled, master SS pin reverts to general-purpose I/O not controlled by SPI
1 Mode fault function enabled, master SS pin acts as the mode fault input or the slave select output
Bidirectional Mode Output Enable — When bidirectional mode is enabled by SPI pin control 0 (SPC0) = 1,
BIDIROE determines whether the SPI data output driver is enabled to the single bidirectional SPI I/O pin.
Depending on whether the SPI is configured as a master or a slave, it uses either the MOSI (MOMI) or MISO
(SISO) pin, respectively, as the single SPI data I/O pin. When SPC0 = 0, BIDIROE has no meaning or effect.
0 Output driver disabled so SPI data I/O pin acts as an input
1 SPI I/O pin enabled as an output
SPI Stop in Wait Mode
0 SPI clocks continue to operate in wait mode
1 SPI clocks stop when the MCU enters wait mode
SPI Pin Control 0 — The SPC0 bit chooses single-wire bidirectional mode. If MSTR = 0 (slave mode), the SPI
uses the MISO (SISO) pin for bidirectional SPI data transfers. If MSTR = 1 (master mode), the SPI uses the MOSI
(MOMI) pin for bidirectional SPI data transfers. When SPC0 = 1, BIDIROE is used to enable or disable the output
driver for the single bidirectional SPI I/O pin.
0 SPI uses separate pins for data input and data output
1 SPI configured for single-wire bidirectional operation
SPI Baud Rate Prescale Divisor — This 3-bit field selects one of eight divisors for the SPI baud rate prescaler
as shown in
drives the input of the SPI baud rate divider (see
SPI Baud Rate Divisor — This 3-bit field selects one of eight divisors for the SPI baud rate divider as shown in
Table
divider is the SPI bit rate clock for master mode.
0
0
7
12-6. The input to this divider comes from the SPI baud rate prescaler (see
= Unimplemented or Reserved
for more details).
Table
SPPR2
0
6
12-5. The input to this prescaler is the bus rate clock (BUSCLK). The output of this prescaler
Table 12-4. SPI1BR Register Field Descriptions
Table 12-3. SPI1C2 Register Field Descriptions
Figure 12-7. SPI Baud Rate Register (SPI1BR)
MC9S08AC16 Series Data Sheet, Rev. 8
SPPR1
0
5
SPPR0
0
4
Figure
Description
Description
12-4).
3
0
0
SPR2
0
2
Serial Peripheral Interface (S08SPIV3)
Figure
12-4). The output of this
SPR1
0
1
SPR0
0
0
217
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