C8051F334-GMR Silicon Laboratories Inc, C8051F334-GMR Datasheet - Page 179

• Manufacturer Part Number: C8051F334-GMR
• Description: IC 8051 MCU 2K FLASH 20MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F334-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• For Use With: 336-1451 - ADAPTER PROGRAM TOOLSTICK F330
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bits1 – 0: SCA1 – SCA0: Timer 0/1 Prescale Bits.
T3MH
R/W
Bit7
T3MH: Timer 3 High Byte Clock Select.
This bit selects the clock supplied to the Timer 3 high byte if Timer 3 is configured in split 8-
bit timer mode. T3MH is ignored if Time 3 is in any other mode.
0: Timer 3 high byte uses the clock defined by the T3XCLK bit in TMR3CN.
1: Timer 3 high byte uses the system clock.
T3ML: Timer 3 Low Byte Clock Select.
This bit selects the clock supplied to Timer 3. If Timer 3 is configured in split 8-bit timer
mode, this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 3 low byte uses the clock defined by the T3XCLK bit in TMR3CN.
1: Timer 3 low byte uses the system clock.
T2MH: Timer 2 High Byte Clock Select.
This bit selects the clock supplied to the Timer 2 high byte if Timer 2 is configured in split 8-
bit timer mode. T2MH is ignored if Timer 2 is in any other mode.
0: Timer 2 high byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 high byte uses the system clock.
T2ML: Timer 2 Low Byte Clock Select.
This bit selects the clock supplied to Timer 2. If Timer 2 is configured in split 8-bit timer
mode, this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 2 low byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 low byte uses the system clock.
T1M: Timer 1 Clock Select.
This select the clock source supplied to Timer 1. T1M is ignored when C/T1 is set to logic 1.
0: Timer 1 uses the clock defined by the prescale bits, SCA1 – SCA0.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit selects the clock source supplied to Timer 0. T0M is ignored when C/T0 is set to
logic 1.
0: Counter/Timer 0 uses the clock defined by the prescale bits, SCA1 – SCA0.
1: Counter/Timer 0 uses the system clock.
These bits control the division of the clock supplied to Timer 0 and/or Timer 1 if configured
to use prescaled clock inputs.
Note: External clock divided by 8 is synchronized with
the system clock.
SCA1
T3ML
0
0
1
1
R/W
Bit6
SCA0
SFR Definition 18.3. CKCON: Clock Control
0
1
0
1
T2MH
R/W
Bit5
System clock divided by 12
System clock divided by 4
System clock divided by 48
External clock divided by 8
T2ML
R/W
Bit4
Prescaled Clock
Rev. 1.7
T1M
R/W
Bit3
T0M
R/W
Bit2
C8051F330/1/2/3/4/5
SCA1
R/W
Bit1
SCA0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x8E
183