MC9S08GT16ACFDER Freescale Semiconductor, MC9S08GT16ACFDER Datasheet - Page 143

• Manufacturer Part Number: MC9S08GT16ACFDER
• Description: IC MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT16ACFDER

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Package: 48QFN EP
• Family Name: HCS08
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 39
• Interface Type: I2C/SCI/SPI
• On-chip Adc: 8-chx10-bit
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.4.11
The ICG provides a fixed frequency clock output, XCLK, for use by on-chip peripherals. This output is
equal to the internal bus clock, BUSCLK, in all modes except FEE. In FEE mode, XCLK is equal to
ICGERCLK ÷ 2 when the following conditions are met:
If the above conditions are not true, then XCLK is equal to BUSCLK.
When the ICG is in either FEI or SCM mode, XCLK is turned off. Any peripherals which can use XCLK
as a clock source must not do so when the ICG is in FEI or SCM mode.
9.4.12
The oscillator has the option of running in a high gain oscillator (HGO) mode, which improves the
oscillator's resistance to EMC noise when running in FBE or FEE modes. This option is selected by writing
a 1 to the HGO bit in the ICGC1 register. HGO is used with both the high and low range oscillators but is
only valid when REFS = 1 in the ICGC1 register. When HGO = 0, the standard low-power oscillator is
selected. This bit is writable only once after any reset.
9.5
9.5.1
The section is intended to give some basic direction on which configuration a user would want to select
when initializing the ICG. For some applications, the serial communication link may dictate the accuracy
of the clock reference. For other applications, lowest power consumption may be the chief clock
consideration. Still others may have lowest cost as the primary goal. The ICG allows great flexibility in
choosing which is best for any application.
Freescale Semiconductor
•
•
(P × N) ÷ R ≥ 4 where P is determined by RANGE (see
MFD and RFD respectively (see
LOCK = 1.
Initialization/Application Information
Fixed Frequency Clock
High Gain Oscillator
Introduction
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Table
9-12).
Table
9-11), N and R are determined by
Internal Clock Generator (S08ICGV4)
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