MC9S08GT16ACFDER Freescale Semiconductor, MC9S08GT16ACFDER Datasheet - Page 57

IC MCU 8BIT 16K FLASH 48-QFN

MC9S08GT16ACFDER

Manufacturer Part Number
MC9S08GT16ACFDER
Description
IC MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT16ACFDER

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Package
48QFN EP
Family Name
HCS08
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
39
Interface Type
I2C/SCI/SPI
On-chip Adc
8-chx10-bit
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
4.6.2
During reset, the contents of the nonvolatile location NVOPT are copied from FLASH into FOPT. Bits 5
through 2 are not used and always read 0. This register may be read at any time, but writes have no meaning
or effect. To change the value in this register, erase and reprogram the NVOPT location in FLASH memory
as usual and then issue a new MCU reset.
Freescale Semiconductor
Reset
KEYEN
Field
7
W
R
KEYEN
FLASH Options Register (FOPT and NVOPT)
Backdoor Key Mechanism Enable — When this bit is 0, the backdoor key mechanism cannot be used to
disengage security. The backdoor key mechanism is accessible only from user (secured) firmware. BDM
commands cannot be used to write key comparison values that would unlock the backdoor key. For more detailed
information about the backdoor key mechanism, refer to
0 No backdoor key access allowed.
1 If user firmware writes an 8-byte value that matches the nonvolatile backdoor key (NVBACKKEY through
7
200 kHz
150 kHz
20 MHz
10 MHz
8 MHz
4 MHz
2 MHz
1 MHz
NVBACKKEY+7, in that order), security is temporarily disengaged until the next MCU reset.
f
Bus
= Unimplemented or Reserved
FNORED
(Binary)
PRDIV8
6
1
0
0
0
0
0
0
0
This register is loaded from nonvolatile location NVOPT during reset.
Figure 4-6. FLASH Options Register (FOPT)
Table 4-7. FLASH Clock Divider Settings
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Table 4-8. FOPT Field Descriptions
DIV5:DIV0
(Decimal)
0
5
12
49
39
19
9
4
0
0
0
4
192.3 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
f
FCLK
Description
Section 4.5,
0
3
Program/Erase Timing Pulse
(5 µs Min, 6.7 µs Max)
“Security.”
5.2 µs
6.7 µs
5 µs
5 µs
5 µs
5 µs
5 µs
5 µs
0
2
SEC01
1
SEC00
Memory
0
57

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