HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 432

• Manufacturer Part Number: HD64F36912GFH
• Description: IC H8 MCU FLASH 8K 32-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F36912GFH

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Rev. 3.00 Sep. 14, 2006 Page 402 of 408
REJ09B0105-0300
Item
5.2.3 RC Trimming Data
Register (RCTRMDR)
5.2.4 Clock Control/Status
Register (CKCSR)
Figure 5.5 Timing Chart of
Switching On-chip Oscillator
Clock to External Clock
Table 5.1 Crystal Resonator
Parameters
Section 7 ROM
Figure 7.1 Flash Memory
Block Configuration
Table 7.3 System Clock
Frequencies for which
Automatic Adjustment of LSI
Bit Rate is Possible
Figure 7.4 Erase/Erase-
Verify Flowchart
Section 8 RAM
Page Revision (See Manual for Details)
73
74
78
82
97
98
105
111
115
Note: * The
The features of the 12-kbyte (including 4 kbytes as the E7 or E8
control program area) flash memory built into the HD64F36912G
and HD64F36902G are summarized below.
Note: * When the E7 or E8 is used, area H'F980 to H'FD7F must
Bit
7
6
5
4
3
2
1
0
Bit
7
6
Programming unit: 64 kbytes
Frequency (MHz) 12
R
Host Bit Rate
9600bps
4800bps
2400bps
S
(Max.)
rising edge of the
clock have elapsed.
not be accessed.
Bit Name Description
TRMD7
TRMD6
TRMD5
TRMD4
TRMD3
TRMD2
TRMD1
TRMD0
Bit Name Description
PMRC1
PMRC0
clock stops to the first
Increment address
halt duration is the duration from the timing when the
8 MHz (on-chip oscillator clock)
8 MHz (on-chip oscillator clock)
8 MHz (on-chip oscillator clock)
System Clock Frequency Range of LSI
Trimming Data
In the flash memory version, the trimming
data is loaded from the flash memory to this
register right after a reset. These bits are
always read as undefined value.
As for the masked ROM version (under
planning), the on-chip oscillator frequency
can be trimmed by rewriting these bits.
Port C Function Select 1 and 0
50
OSC
clock after six clock cycles of the
Verify data = all 1s ?
Read verify data
Yes
No
RC