MC908GR32ACFAE Freescale Semiconductor, MC908GR32ACFAE Datasheet - Page 155

• Manufacturer Part Number: MC908GR32ACFAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$0009
$000A
$000B
$0013
$0014
$0015
$0016
$0017
$0018
$0019
Addr.
ESCI Baud Rate Register
ESCI Prescaler Register
ESCI Control Register 1
ESCI Control Register 2
ESCI Control Register 3
ESCI Status Register 1
ESCI Status Register 2
Register Name
ESCI Arbiter Control
Register (SCIADAT)
Register (SCIACTL)
ESCI Data Register
ESCI Arbiter Data
See page 175.
See page 179.
See page 180.
See page 166.
See page 168.
See page 169.
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See page 174.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
(SCPSC)
(SCDR)
(SCBR)
(SCC1)
(SCC2)
(SCC3)
(SCS1)
(SCS2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Figure 13-4. ESCI I/O Register Summary
LOOPS
SCTIE
PDS2
ARD7
SCTE
Bit 7
LINT
AM1
R8
R7
T7
U
0
0
0
0
0
1
0
0
0
= Unimplemented
ALOST
ENSCI
PDS1
ARD6
TCIE
LINR
TC
R6
T8
T6
6
0
0
0
0
0
0
1
0
0
0
SCRIE
TXINV
SCRF
PDS0
ARD5
SCP1
AM0
R5
T5
R
5
0
0
0
0
0
0
0
0
0
0
PSSB4
Unaffected by reset
ACLK
ARD4
SCP0
IDLE
ILIE
R4
T4
M
R
R
4
0
0
0
0
0
0
0
0
0
0
= Reserved
PSSB3
WAKE
ARD3
ORIE
AFIN
OR
TE
R3
T3
3
0
0
0
0
0
0
0
0
0
R
0
PSSB2
ARUN
ARD2
SCR2
NEIE
ILTY
RE
NF
R2
T2
2
0
0
0
0
0
0
0
0
0
0
Functional Description
AROVFL
PSSB1
ARD1
SCR1
RWU
FEIE
PEN
BKF
FE
R1
T1
1
0
0
0
0
0
0
0
0
0
PSSB0
ARD8
ARD0
SCR0
PEIE
Bit 0
PTY
SBK
RPF
PE
R0
T0
0
0
0
0
0
0
0
0
0
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