MCF52223CAF80 Freescale Semiconductor, MCF52223CAF80 Datasheet - Page 22

IC MCU 256K FLASH 80MHZ 100-LQFP

MCF52223CAF80

Manufacturer Part Number
MCF52223CAF80
Description
IC MCU 256K FLASH 80MHZ 100-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5222xr
Datasheet

Specifications of MCF52223CAF80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C/QSPI/UART/USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
56
Number Of Timers
10
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52221DEMO, M52223EVB
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
For Use With
M52223EVB - BOARD EVAL FOR MCF52223
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Family Configurations
1.6
Table 9
1.7
Table 10
1.8
This device is compliant with industry standard USB 2.0 specification.
1.9
Table 11
22
Synchronous Peripheral
QSPI Synchronous
QSPI Synchronous
QSPI Serial Clock
External Interrupts
describes the external interrupt signals.
Serial Data Input
describes the QSPI signals.
describes the I
Signal Name
Serial Output
Signal Name
Chip Selects
Signal Name
Serial Clock
Serial Data
External Interrupt Signals
Queued Serial Peripheral Interface (QSPI)
USB On-the-Go
I
2
1
2
C I/O Signals
The PLL pre-divider (CCHR+1) reset value is 6 and the PLL input reference range is 2–10 MHz,
so in order to boot with the PLL enabled, the external clock or crystal frequency needs to be
greater than 12 MHz. MCF5222x devices cannot boot with PLL enabled from an external clock
or crystal oscillator with frequency less than 12 MHz. This constraint does not apply to booting
with PLL disabled.
Cannot boot from the Internal 8 MHz Relaxation oscillator with the PLL enabled. Refer Note1.
Thus this mode has been removed from the table.
2
C serial interface module signals.
Table 10. Queued Serial Peripheral Interface (QSPI) Signals
QSPI_CS[3:0] QSPI peripheral chip select; can be programmed to be active high or
Abbreviation
Abbreviation
Abbreviation
QSPI_DOUT Provides the serial data from the QSPI and can be programmed to be
QSPI_CLK
QSPI_DIN
IRQ[7:1]
SDAn
SCLn
MCF52223 ColdFire Microcontroller, Rev. 3
Table 9. External Interrupt Signals
External interrupt sources.
Open-drain clock signal for the for the I
In master mode, this clock is driven by the I
is in slave mode, this clock becomes the clock input.
Open-drain signal that serves as the data input/output for the I
interface.
driven on the rising or falling edge of QSPI_CLK.
Provides the serial data to the QSPI and can be programmed to be
sampled on the rising or falling edge of QSPI_CLK.
Provides the serial clock from the QSPI. The polarity and phase of
QSPI_CLK are programmable.
low.
Table 11. I
2
C I/O Signals
Function
Function
Function
2
C interface. When the bus is
2
C module; when the bus
Freescale Semiconductor
2
C
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I

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