C8051F019-GQ Silicon Laboratories Inc, C8051F019-GQ Datasheet - Page 113
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C8051F019-GQ
Manufacturer Part Number
C8051F019-GQ
Description
IC 8051 MCU 16K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Specifications of C8051F019-GQ
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
48-TQFP, 48-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
No. Of I/o's
16
Ram Memory Size
1.25KB
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1198
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F019-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
16. UART
The UART is a serial port capable of asynchronous transmission. The UART can function in full duplex mode. In
all modes, receive data is buffered in a holding register. This allows the UART to start reception of a second
incoming data byte before software has finished reading the previous data byte.
The UART has an associated Serial Control Register (SCON) and a Serial Data Buffer (SBUF) in the SFRs. The
single SBUF location provides access to both transmit and receive registers. Reads access the Receive register and
writes access the Transmit register automatically.
The UART is capable of generating interrupts if enabled. The UART has two sources of interrupts: a Transmit
Interrupt flag, TI (SCON.1) set when transmission of a data byte is complete, and a Receive Interrupt flag, RI
(SCON.0) set when reception of a data byte is complete. The UART interrupt flags are not cleared by hardware
when the CPU vectors to the interrupt service routine. They must be cleared manually by software. This allows
software to determine the cause of the UART interrupt (transmit complete or receive complete).
113
S
M
O
D
Overflow
Overflow
C8051F018
C8051F019
Timer 1
Timer 2
PCON
SYSCLK
2
M
S
0
Baud Rate Generation Logic
SMOD
1
0
S
M
1
S
M
2
SCON
R
E
N
32
64
12
T
B
8
R
B
8
T
I
SMOD
RCLK
TCLK
R
I
0
1
0
1
1
0
16
16
R
C
L
K
T2CON
T
C
L
K
SFR Bus
Figure 16.1. UART Block Diagram
00
01
10
11
00
01
10
11
SM0, SM1
{MODE}
Write to
SBUF
Rev. 1.2
Rx Clock
Tx Clock
Start
Start
Bit Detector
Interrupt
Serial
Port
D
TB8
SET
CLR
Stop Bit
Q
Gen.
SBUF
Read
TI
RI
Tx Control
Tx IRQ
Rx IRQ
Rx Control
Zero Detector
SFR Bus
Input Shift Register
SBUF
SBUF
Enable
REN
Shift
(9 bits)
0x1FF
RB8
MSB
Load SBUF
SBUF
Send
Data
Load
Shift
Shift
TX
RX
Crossbar
Crossbar
Port I/O