MC56F8322VFAE Freescale Semiconductor, MC56F8322VFAE Datasheet - Page 32

• Manufacturer Part Number: MC56F8322VFAE
• Description: IC DSP 16BIT 60MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8322VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Program Memory Size: 40KB (20K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8323EVME - BOARD EVALUATION MC56F8323
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Part 4 Memory Map
4.1 Introduction
The 56F8322 and 56F8122 devices are 16-bit motor-control chips based on the 56800E core. These parts
use a Harvard-style architecture with two independent memory spaces for Data and Program. On-chip
RAM and Flash memories are used in both spaces.
This section provides memory maps for:
On-chip memory sizes for the device are summarized in
identified in the “Use Restrictions” column of
Note: Data Flash and Program RAM are NOT available on the 56F8122 device.
4.2 Program Map
The Program Memory map is located in
Operating Mode Register (OMR) usually control the Program Memory map. Because the 56F8322 and
56F8122 do not include EMI, the OMR MA bit, which is used to decide internal or external BOOT, will
have no effect on the Program Memory Map. OMR MB reflects the security status of the Program Flash.
After reset, changing the OMR MB bit will have no effect on the Program Flash.
32
•
•
Program Flash
Data Flash
Program RAM
Data RAM
Program Boot Flash
Program Address Space, including the Interrupt Vector Table
Data Address Space, including the EOnCE Memory and Peripheral Memory Maps
On-Chip Memory
56F8322
Table 4-1 Chip Memory Configurations
32KB
8KB
4KB
8KB
8KB
56F8322 Techncial Data, Rev. 16
Table
56F8122
32KB
8KB
8KB
—
—
Table
4-2. The operating mode control bits (MA and MB) in the
Erase / Program via Flash interface unit and word writes
to CDBW
Erase / Program via Flash interface unit and word writes
to CDBW. Data Flash can be read via either CDBR or
XDB2, but not by both simultaneously.
None
None
Erase / Program via Flash Interface unit and word
writes to CDBW
4-1.
Table
4-1. Flash memories’ restrictions are
Use Restrictions
Freescale Semiconductor
Preliminary