MC56F8322VFAE Freescale Semiconductor, MC56F8322VFAE Datasheet - Page 72

IC DSP 16BIT 60MHZ 48-LQFP

MC56F8322VFAE

Manufacturer Part Number
MC56F8322VFAE
Description
IC DSP 16BIT 60MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8322VFAE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8323EVME - BOARD EVALUATION MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.6.10.5
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.10.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.10.7
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.10.8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.11
5.6.11.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.11.2
The contents of this register determine the location of the Vector Address Table. The value in this register
is used as the upper 13 bits of the interrupt vector address. The lower eight bits of the ISR address are
determined based upon the highest-priority interrupt; see
72
Base + $A
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
RESET
Write
Read
Vector Base Address Register (VBA)
ADC A Zero Crossing or Limit Error Interrupt Priority Level
(ADCA_ZC IPL)—Bits 7–6
Reserved—Bits 5–4
ADC A Conversion Complete Interrupt Priority Level
(ADCA_CC IPL)—Bits 3–2
Reserved—Bits 1–0
Reserved—Bits 15–13
Interrupt Vector Base Address (VECTOR BASE ADDRESS)—
Bits 12–0
15
0
0
Figure 5-13 Vector Base Address Register (VBA)
14
0
0
13
0
0
12
0
56F8322 Techncial Data, Rev. 16
11
0
10
0
9
0
8
0
Section 5.3.1
VECTOR BASE ADDRESS
7
0
6
0
5
0
for details.
4
0
3
0
Freescale Semiconductor
2
0
1
0
Preliminary
0
0

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