HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 256

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
• Bits 6–4 (I/O control B2–B0 (IOB2–IOB0)): IOB2–IOB0 selects the GRB function.
Bit 6:
IOB2
0
1
Notes: 1. After reset, the value output is 0 until the first compare match occurs.
• Bit 3 (reserved): Bit 3 always reads as 1. The write value should always be 1.
• Bits 2–0 (I/O control A2–A0 (IOA2–IOA0)): IOA2–IOA0 select the GRB function.
Bit 2:
IOA2
0
1
Notes: 1. After reset, the value output is 0 until the first compare match occurs.
238 RENESAS
2. Channel 2 has no compare-match driven toggle output function. If it is set for toggle, 1
2. Channel 2 has no compare-match driven toggle output function. If it is set for toggle, 1
Bit 5:
IOB1
0
1
0
1
Bit 1:
IOA1
0
1
0
1
is automatically selected as the output.
is automatically selected as the output.
Bit 4:
IOB0
0
1
0
1
0
1
0
1
Bit 0:
IOA0
0
1
0
1
0
1
0
1
GRB Function
GRB is an
output compare 0 output at GRB compare match*
register
GRB is an
input capture
register
GRA Function
GRA is an
output compare 0 output at GRA compare match*
register
GRA is an
input capture
register
Compare match with pin output disabled (initial value)
1 output at GRB compare match*
Output toggles at GRB compare match (1 output for
channel 2 only)*
GRB captures rising edge of input
GRB captures falling edge of input
GRB captures both edges of input
Compare match with pin output disabled (initial value)
1 output at GRA compare match*
Output toggles at GRA compare match (1 output for
channel 2 only)*
GRA captures rising edge of input
GRA captures falling edge of input
GRA captures both edges of input
1,
1,
*
*
2
2
1
1
1
1

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