M30281F8HP#U3B Renesas Electronics America, M30281F8HP#U3B Datasheet - Page 297

• Manufacturer Part Number: M30281F8HP#U3B
• Description: IC M16C/28 MCU FLASH 64K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F8HP#U3B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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R
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e
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1
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NOTE:
J
6
Table 16.8 Start/Stop generation timing table
Table 16.9 S10 Register Settings and Functions
Figure 16.16 Start condition generation timing diagram
Figure 16.17 Stop condition generation timing diagram
0
M
As mentioned above, when the MST and TRX bits are set to "1", START condition or STOP condition mode
is entered by writing "1" or "0" to the BB flag in the S10 register and writing "0" to the PIN bit and 4 low-order
bits in the S10 register at the same time. Then SDA
and SDA
START/STOP conditions are generated. In order to set the MST and TRX bits to "1" without generating the
START/STOP conditions, write "1" to the 4 low-order bits simultaneously. Table 16.9 lists functions along
with the S10 register settings.
C
0
2
9
S
H
S
1
1
1. Actual time at the time of V
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, 1
0
is set to low-level ("L") in the STOP condition standby mode. When the S00 register is set, the
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2
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1
-
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S
B
1
0
1
6
7
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write signal
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write signal
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page 275
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C0 data shift register
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1
s
= 4MHz, The contents in () denote cycle numbers.
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5
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1
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Setup
L
time
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Setup
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time
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is left open in the START condition standby mode
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time
t i
t i
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C bus INTERFACE
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