MC9S12D64CPVE Freescale Semiconductor, MC9S12D64CPVE Datasheet - Page 2

IC MCU 64K FLASH 25MHZ 112LQFP

MC9S12D64CPVE

Manufacturer Part Number
MC9S12D64CPVE
Description
IC MCU 64K FLASH 25MHZ 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12D64CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
49
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Revision History
Number
Version
V01.00
V01.01
V01.02
V01.03
V01.04
V01.05
Revision
16 NOV
18 FEB
30 July
6 MAR
4 June
Date
4 July
2001
2002
2002
2002
2002
2002
Effective
19 NOV
18 FEB
30 July
6 MAR
4 June
4 July
Date
2001
2002
2002
2002
2002
2002
Author
Initial version based on MC9SDP256-2.09 Version.
In table 7 I/O Characteristics" of the electrical characteristics
replaced tPULSE with tpign and tpval in lines "Port ... Interrupt Input
Pulse filtered" and "Port ... Interrupt Input Pulse passed"
respectively.
Table "Oscillator Characteristics": removed "Oscillator start-up time
from POR or STOP" row
Table "5V I/O Characteristics": Updated
Partial Drive IOH = +–2mA and Full Drive IOH = –10mA
Table "ATD Operating Characteristics": Distinguish I
ATD blocks on
Table "ATD Electrical Characteristics": Update C
Table "Operating Conditions": Changed V
(min)
Removed Document number except from Cover Sheet
Updated Table "Document References"
Table "5V I/O Characteristics" : Corrected Input Capacitance to 6pF
Section: "Device Pinout" (112-pin and 80-pin): added in diagrams
RXCAN0 to PJ6 and TXCAN0 to PJ7
Table "PLL Characteristics": Updated parameters K
Figure "Basic PLL functional diagram": Inserted XFC pin in diagram
Enhanced section "XFC Component Selection"
Added to Sections ATD, ECT and PWM: freeze mode = active BDM
mode
Added 1L86D to Table "Assigned Part ID numbers"
Corrected MEMSIZ1 value in Table "Memory size registers"
Subsection "Device Memory Map: Removed Flash mapping from
$0000 to $3FFF.
Table "Signal Properties": Added column "Internal Pull Resistor".
Preface Table "Document References": Changed to full naming for
each block.
Table "Interrupt Vector Locations", Column "Local Enable":
Corrected several register and bit names.
Figure "Recommended PCB Layout for 80QFP: Corrected
VREGEN pin position
Thermal values for junction to board and package
BGND pin pull-up
Part Order Information
Global Register Table
Chip Configuration Summary
Modified mode of Operations chapter
Section "Printed Circuit Board Layout Proposals": added Pierce
Oscillator examples for 112LQFP and 80QFP
Description of Changes
DD
and V
INS
DDPLL
1
REF
to 22 pF
and f
for 1 and 2
to 2.35 V
1

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