M308A5SGP#U5 Renesas Electronics America, M308A5SGP#U5 Datasheet - Page 23

MCU ROMLESS 12K RAM 144-LQFP

M308A5SGP#U5

Manufacturer Part Number
M308A5SGP#U5
Description
MCU ROMLESS 12K RAM 144-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M308A5SGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
81
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 18x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M308A5SGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
M308A5SGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M32C/8A Group
REJ03B0213-0111 Rev.1.11 Mar 31, 2009
Page 21 of 66
3.
Figure 3.1 shows a memory map of the M32C/8A Group.
The M32C/8A Group has 16-Mbyte address space from addresses 000000h to FFFFFFh.
The fixed interrupt vectors are allocated in addresses FFFFDCh to FFFFFFh. They store the starting address of each
interrupt routine.
The internal RAM is allocated higher addresses, beginning with address 000400h. For example, a 12-Kbyte internal
RAM area is allocated in addresses 000400h to 0033FFh. The internal RAM is used not only for storing data but for
the stacks when subroutines are called or when interrupt requests are acknowledged.
SFRs are allocated in addresses 000000h to 0003FFh. The peripheral function control registers such as for I/O ports,
A/D converters, serial interfaces, timers are allocated here. All blank spaces within SFRs are reserved and cannot be
accessed by users.
The special page vectors are allocated addresses FFFE00h to FFFFDBh. They are used for the JMPS instruction and
JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.
Figure 3.1
Memory
NOTE:
1. The watchdog timer interrupt, oscillation stop detection interrupt , and Vdet4 detection interrupt use the same vector.
000000h
000400h
XXXXXXh
010000h
FFFFFFh
Memory Map
External Space
Internal RAM
Reserved
SFR
FFFFDCh
FFFE00h
FFFFFFh
Undefined instruction
Watchdog timer
BRK instruction
Address match
Special page
vector table
Overflow
Reset
NMI
(1)
12 Kbytes
24 Kbytes
Capacity
Internal RAM
XXXXXXh
0033FFh
0063FFh
3. Memory

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