M30800SFP-BL#D5 Renesas Electronics America, M30800SFP-BL#D5 Datasheet - Page 137

• Manufacturer Part Number: M30800SFP-BL#D5
• Description: MCU 3/5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#D5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
16. Serial I/O
UART0 to 4
e
E
1
v
J
6
Table 16.1 Comparison of functions of UART0 to UART4
1 .
0
Note 1: Only when clock synchronous serial I/O mode.
Note 2: Only when clock synchronous serial I/O mode and 8-bit UART mode.
Note 3: Only when UART mode.
Note 4: Using for SIM interface.
C
Continuous receive mode
selection
Serial I/O is configured as five channels: UART0 to UART4.
UART0 to UART4 each have an exclusive timer to generate a transfer clock, so they operate independently
of each other.
Figures 16.1 and 16.2 show the block diagram of UARTi (i=0 to 4). Figures 16.3 and 16.4 show the block
diagram of the transmit/receive unit.
UARTi has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous serial I/O
mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses 0360
0368
as a UART.
Although a few functions are different, UART0 to UART4 have almost the same functions.
UART2 to UART4, in particular, are compliant with the SIM interface with some extra settings added in
clock-asynchronous serial I/O mode (Note). It also has the bus collision detection function that generates
an interrupt request if the TxD pin and the RxD pin are different in level.
Table 16.1 shows the comparison of functions of UART0 to UART4, and Figures 16.5 through 16.11 show
the registers related to UARTi.
Note: SIM : Subscriber Identity Module
CLK polarity selection
LSB first / MSB first selection
Separate CTS/RTS pins
Serial data logic switch
Sleep mode selection
TxD, RxD I/O polarity switch
TxD, RxD port output format
Parity error signal output
Bus collision detection
Transfer clock output from
multiple pins selection
9
0 .
8 /
B
0
0
0
1
A
16
8
G
u
7
o r
, 0338
. g
0 -
u
1
0
p
Function
0
, 2
0
2
16
0
, 0328
0
5
Page 124
16
and 02F8
Possible
Possible
Possible
Impossible
Possible
Impossible
Possible
Impossible
Impossible
Impossible
CMOS output
f o
3
UART0
2
16
9
) determine whether UARTi is used as a clock synchronous serial I/O or
(Note 3)
(Note 1)
(Note 1)
(Note 1)
Possible
Possible
Possible
Impossible
Impossible
Possible
Impossible
CMOS output
Impossible
Impossible
Possible
UART1
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 3)
Possible
Possible
N-channel open
drain output
Possible
Impossible
Impossible
Possible
Impossible
Possible
Possible
Possible
UART2
(Note 1)
(Note 2)
(Note 1)
(Note 4)
(Note 4)
Possible
Possible
CMOS output
Possible
Impossible
Impossible
Possible
Impossible
Possible
Possible
Possible
UART3
(Note 1)
(Note 2)
(Note 1)
(Note 4)
(Note 4)
Possible
Possible
Possible
Impossible
Impossible
Possible
Impossible
Possible
Possible
Possible
16. Serial I/O
CMOS output
UART4
(Note 1)
(Note 1)
(Note 2)
(Note 4)
(Note 4)
16
,