COP8CCE9IMT9/NOPB National Semiconductor, COP8CCE9IMT9/NOPB Datasheet - Page 4

• Manufacturer Part Number: COP8CCE9IMT9/NOPB
• Description: IC MCU EEPROM 8BIT 8K 48-TSSOP
• Manufacturer: National Semiconductor
• Series: COP8™ 8Cr

Specifications of COP8CCE9IMT9/NOPB

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: Microwire/Plus (SPI), UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-TSSOP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Data Ram Size: 256 B
• On-chip Adc: 10 bit, 16 channel
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Height: 0.9 mm
• Interface Type: SPI, USART
• Length: 12.5 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 6.1 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: *COP8CCE9IMT9; *COP8CCE9IMT9/NOPB; COP8CCE9IMT9

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13.0 Power Saving Features ............................................................................................................................ 38
14.0 USART ..................................................................................................................................................... 44
15.0 A/D Converter ........................................................................................................................................... 51
16.0 Interrupts .................................................................................................................................................. 55
12.2 TIMER T1 AND TIMER T2 .................................................................................................................... 35
12.3 TIMER CONTROL FLAGS .................................................................................................................... 37
13.1 POWER SAVE MODE CONTROL REGISTER .................................................................................... 38
13.2 OSCILLATOR STABILIZATION ............................................................................................................. 39
13.3 HIGH SPEED MODE OPERATION ...................................................................................................... 39
13.4 DUAL CLOCK MODE OPERATION ...................................................................................................... 41
13.5 LOW SPEED MODE OPERATION ....................................................................................................... 42
13.6 MULTI-INPUT WAKE-UP ...................................................................................................................... 44
14.1 USART CONTROL AND STATUS REGISTERS ................................................................................... 45
14.2 DESCRIPTION OF USART REGISTER BITS ...................................................................................... 45
14.3 ASSOCIATED I/O PINS ........................................................................................................................ 46
14.4 USART OPERATION ............................................................................................................................ 47
14.5 FRAMING FORMATS ............................................................................................................................ 47
14.6 USART INTERRUPTS .......................................................................................................................... 48
14.7 BAUD CLOCK GENERATION .............................................................................................................. 48
14.8 EFFECT OF HALT/IDLE ....................................................................................................................... 50
14.9 DIAGNOSTIC ........................................................................................................................................ 50
14.10 ATTENTION MODE ............................................................................................................................. 50
14.11 BREAK GENERATION ........................................................................................................................ 50
15.1 OPERATING MODES ........................................................................................................................... 51
15.2 A/D OPERATION ................................................................................................................................... 54
15.3 ANALOG INPUT AND SOURCE RESISTANCE CONSIDERATIONS .................................................. 54
12.2.1 Timer Operating Speeds .................................................................................................................. 35
12.2.2 Mode 1. Processor Independent PWM Mode ................................................................................. 35
12.2.3 Mode 2. External Event Counter Mode ........................................................................................... 36
12.2.4 Mode 3. Input Capture Mode .......................................................................................................... 36
13.3.1 High Speed Halt Mode .................................................................................................................... 39
13.3.2 High Speed Idle Mode ..................................................................................................................... 40
13.4.1 Dual Clock HALT Mode ................................................................................................................... 41
13.4.2 Dual Clock Idle Mode ...................................................................................................................... 41
13.5.1 Low Speed HALT Mode ................................................................................................................... 42
13.5.2 Low Speed Idle Mode ...................................................................................................................... 42
14.4.1 Asynchronous Mode ........................................................................................................................ 47
14.4.2 Synchronous Mode .......................................................................................................................... 47
15.1.1 A/D Control Register ........................................................................................................................ 51
15.1.2 A/D Result Registers ....................................................................................................................... 53
15.2.1 Prescaler .......................................................................................................................................... 54
13.3.1.1 ENTERING THE HIGH SPEED HALT MODE ........................................................................... 39
13.3.1.2 EXITING THE HIGH SPEED HALT MODE ............................................................................... 39
13.3.1.3 HALT EXIT USING RESET ....................................................................................................... 39
13.3.1.4 HALT EXIT USING MULTI-INPUT WAKE-UP ........................................................................... 39
13.3.1.5 OPTIONS ................................................................................................................................... 40
13.4.1.1 ENTERING THE DUAL CLOCK HALT MODE .......................................................................... 41
13.4.1.2 EXITING THE DUAL CLOCK HALT MODE .............................................................................. 41
13.4.1.3 HALT EXIT USING RESET ....................................................................................................... 41
13.4.1.4 HALT EXIT USING MULTI-INPUT WAKE-UP ........................................................................... 41
13.4.1.5 OPTIONS ................................................................................................................................... 41
13.5.1.1 ENTERING THE LOW SPEED HALT MODE ............................................................................ 42
13.5.1.2 EXITING THE LOW SPEED HALT MODE ................................................................................ 42
13.5.1.3 HALT EXIT USING RESET ....................................................................................................... 42
13.5.1.4 HALT EXIT USING MULTI-INPUT WAKE-UP ........................................................................... 42
13.5.1.5 OPTIONS ................................................................................................................................... 42
15.1.1.1 CHANNEL SELECT ................................................................................................................... 51
15.1.1.2 MULTIPLEXOR OUTPUT SELECT ........................................................................................... 52
15.1.1.3 MODE SELECT ......................................................................................................................... 53
15.1.1.4 PRESCALER SELECT .............................................................................................................. 53
15.1.1.5 BUSY BIT ................................................................................................................................... 53
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