MCF5280CVF66J Freescale Semiconductor, MCF5280CVF66J Datasheet - Page 737
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MCF5280CVF66J
Manufacturer Part Number
MCF5280CVF66J
Description
IC MPU RISC 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5280CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5280CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Appendix B
Revision History
This appendix lists major changes between versions of the MCF5282UM document.
B.1
Freescale Semiconductor
Table 9-4 on page
Table 9-4 on page
“Debug
Figure 30-41 on
Table 10-13 on
Figure 10-1 on
Figure 10-3 on
Figure 10-5 on
15.2.3.2/15-13
Figure 27-4 on
Table 14-3 on
15.2.3.1/15-9
14.2.4/14-22
Chapter 30,
page 10-13
page 10-10
page 14-11
page 30-45
page 10-6
page 10-8
page 27-6
Title page
Location
33.1/33-1
15.2/15-3
9-6
9-6
Support”
Changes Between Rev. 0 and Rev. 0.1
Changed title from “MCF5282 ColdFire
ColdFire
Added “This product incorporates SuperFlash® technology licensed from SST.”
Changed equation in footnote to f
MHz.
Multiplied all PLL frequencies in table by 2.
Changed DTMRx to DTIMx.
Changed bit numbers from 63–32 to 31–0.
Changed bit numbers from 63–32 to 31–0.
Changed bit numbers from 63–32 to 31–0.
Added
Added
Added “Unlike the MCF5272, the MCF5282 does not have an independent SDRAM clock signal. For the
MCF5282, the timing of the SDRAM controller is controlled by the CLKOUT signal.”
Added
Added “Note: Because the MCF5282 has 24 external address lines, the maximum SDRAM address size
is 128 Mbits.”
Changed reset value to 0010_0000_0000_0000.
Changed “PSTCLK” references to “CLKOUT.”
Changed “TEA” to “TA.”
Section 14.2.4, “Chip Configuration
Table
Section 15.2.3.2, “SDRAM Byte Strobe
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
®
Microcontroller User’s Manual.”
14-3.
Table B-1. Rev. 0 to Rev. 0.1 Changes
sys
= f
ref
®
Integrated Microprocessor User’s Manual” to “MCF5282
× 2(MFD + 2)/2 exp RFD; f
Signals.”
Description
Connections.”
ref
× 2(MFD + 2) ≤ 80 MHz, f
sys
≤ 66
B-1
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