HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 280

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.4.5
In the reset-synchronized PWM mode, three pairs of complementary positive and negative PWM
waveforms that share a common wave turning point can be obtained using channels 3 and 4. When
set for reset-synchronized PWM mode, the TIOCA3, TIOCB3, TIOCA4, TOCXA4, TIOCB4, and
TOCXB4 pins automatically become PWM output pins and TCNT3 becomes an upcounter. Table
10.12 shows the PWM output pins used and table 10.13 shows the settings of the registers used.
Table 10.12 Output Pins for Reset-Synchronized PWM Mode
Channel
3
4
Table 10.13 Register Settings for Reset-Synchronized PWM Mode
Register
TCNT3
TCNT4
GRA3
GRB3
GRA4
GRB4
Procedure for Selecting the Reset-Synchronized PWM Mode (figure 10.31):
1. Clear the STR3 bits in the TSTR to halt TCNT3. The reset-synchronized PWM mode must be
2. Set bits TPSC2–TPSC0 in the TCR to select the counter clock source for channel 3. If an
3. Set bits CCLR1 and CCLR0 in the TCR3 to select GRA3 as a counter clear source.
4. Set bits CMD1 and CMD0 in TMDB to select the reset-synchronized PWM mode. TIOCA3–
262 RENESAS
set up while TCNT3 is halted.
external clock source is selected, select the external clock edges with bits CKEG1 and CKEG0
in the TCR.
TIOCB4, TOCXA4, and TOCXB4 automatically become PWM output pins.
Reset-Synchronized PWM Mode
Description of Contents
Initial setting of H'0000
Not used (functions independently)
Set count cycle for TCNT3
Sets the turning point for PWM waveform output by the TIOCA3 and TIOCB3 pins
Sets the turning point for PWM waveform output by the TIOCA4 and TOCXA4 pins
Sets the turning point for PWM waveform output by the TIOCB4 and TOCXB4 pins
Output Pin
TIOCA3
TIOCB3
TIOCA4
TOCXA4
TIOCB4
TOCXB4
Description
PWM output 1
PWM output 1' (negative-phase waveform of PWM output 1)
PWM output 2
PWM output 2' (negative-phase waveform of PWM output 2)
PWM output 3
PWM output 3' (negative-phase waveform of PWM output 3)

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