HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 45

• Manufacturer Part Number: HD6477021X20V
• Description: MCU 5V 32K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6477021X20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

2.3.2
Addressing modes and effective address calculation are described in table 2.8.
Table 2.8
Addressing
Mode
Direct
register
addressing
Indirect
register
addressing
Post-incre-
ment
indirect
register
addressing
Pre-decre-
ment
indirect
register
addressing
22 RENESAS
Addressing Modes
Addressing Modes and Effective Addresses
Mnemonic
Expression
Rn
@Rn
@Rn +
@–Rn
Effective Addresses Calculation
The effective address is register Rn. (The operand is
the contents of register Rn.)
The effective address is the content of register Rn.
The effective address is the content of register Rn. A
constant is added to the content of Rn after the
instruction is executed. 1 is added for a byte
operation, 2 for a word operation, and 4 for a long
word operation.
The effective address is the value obtained by
subtracting a constant from Rn. 1 is subtracted for a
byte operation, 2 for a word operation, and 4 for a
long word operation.
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn – 1/2/4
+
–
Rn – 1/2/4
Rn
Rn
Equation
—
Rn
Rn
(After the
instruction is
executed)
Byte: Rn + 1
Word: Rn + 2
Long word:
Rn + 4
Byte: Rn – 1
Word: Rn – 2
Long word:
Rn – 4
(Instruction
executed with
Rn after
calculation)
Rn
Rn
Rn
Rn
Rn
Rn