MC711K4CFNE3 Freescale Semiconductor, MC711K4CFNE3 Datasheet - Page 96

• Manufacturer Part Number: MC711K4CFNE3
• Description: IC MCU 8BIT 24K EPROM 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC711K4CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating Modes and On-Chip Memory
4.8.1.2 Block Protect Register
Technical Data
96
Address: $0035
This register prevents inadvertent writes to both the CONFIG register
and EEPROM. The active bits in this register are initialized to 1 out of
reset and can be cleared only during the first 64 E-clock cycles after
reset in the normal modes. When these bits are cleared, the associated
EEPROM section and the CONFIG register can be programmed or
erased. EEPROM is only visible if the EEON bit in the CONFIG register
is set. The bits in the BPROT register can be written to 1 at any time to
protect EEPROM and the CONFIG register. In test or bootstrap modes,
write protection is inhibited and BPROT can be written repeatedly.
BULKP — Bulk Erase of EEPROM Protect Bit
LVPEN — Low-Voltage Programming Protect Enable Bit
BPRT[4:0] — Block Protect Bits for EEPROM Bits, see
Reset:
Read:
Write:
The functionality of LVPEN/LVPI was changed from earlier versions
of the M68HC11K Family. Setting this bit has no effect on the LVPI bit
in the PPROG register.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = EEPROM can be bulk erased normally.
1 = EEPROM cannot be bulk or row erased.
0 = Low-voltage programming inhibit (LVPI) for EEPROM disabled
1 = Low-voltage programming inhibit (LVPI) for EEPROM disabled
0 = Protection disabled for associated block
1 = Protection enabled for associated block
Operating Modes and On-Chip Memory
BULKP
Bit 7
1
Figure 4-10. Block Protect Register (BPROT)
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LVPEN
6
1
BPRT4
5
1
PTCON
4
1
BPRT3
3
1
BPRT2
2
1
Table 4-9
M68HC11K Family
BPRT1
1
1
MOTOROLA
BPRT0
Bit 0
1