DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 16

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev. 4.00 Sep 27, 2006 page xiv of xliv
Item
22.10.4 Memory Read
Mode
Figure 22.19 Timing
Waveforms for CE/OE
Clocked Read
22.10.7 Status Read
Mode
Figure 22.22 Status
Read Mode Timing
Waveforms
23.5.3 Erase Block
Registers 1 and 2
(EBR1, EBR2)
Table 23.5 Flash
Memory Erase Blocks
Page
676
681
699
700
Revision (See Manual for Details)
Figure 22.19 amended
FA17 to FA0
Figure 22.22 amended
Bit figure amended
Read/Write description of bits 7 to 2 (Before)
Bit
EBR1
Initial value
Read/Write
Note 2 amended
Note: 2. Bits EB8 and EB9 are not present in the 64-kbyte
versions; they must not be set to1.
64-kbyte description added to table 23.5
128-kbyte Version
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbytes)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
EB8 (32 kbytes)
EB9 (32 kbytes)
FO7 to FO0
WE
OE
CE
WE
OE
CE
t
t
ces
f
Block (Size)
EB9/— *
R/W *
t
wep
1
0
64-kbyte Version
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbytes)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
—
—
t
ceh
1
t
*
r
2
2
t
t
acc
nxtc
EB8/— *
R/W *
Address stable
t
0
0
t
t
ces
f
ce
1
*
t
oe
t
2
wep
2
t
ceh
t
r
H'(00)0C00 to H'(00)0FFF
H'(00)1000 to H'(00)7FFF
H'(00)8000 to H'(00)BFFF
H'(00)C000 to H'(00)DFFF
H'00E000 to H'00FFFF
Address
H'(00)0000 to H'(00)03FF
H'(00)0400 to H'(00)07FF
H'(00)0800 to H'(00)0BFF
H'010000 to H'017FFF
H'018000 to H'01FFFF
Data
t
nxtc
t
oh
t
df
t
Address stable
ce
t
t
oe
acc
t
ce
t
oe
*
2
t
(After)
df
Data
t
nxtc
t
oh
t
df
VIH