M37632EFFP#U2 Renesas Electronics America, M37632EFFP#U2 Datasheet - Page 22

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M37632EFFP#U2

Manufacturer Part Number
M37632EFFP#U2
Description
IC 740 MCU 80QFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M37632EFFP#U2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
INSTRUCTIONS
Rev.2.00 Nov 14, 2006
REJ09B0322-0200
Addressing mode :
Instructions :
(A) ← (A) + (C) + XX
Function :
Example :
page 14 of 185
Absolute Y
Specifies the contents in a memory location as the
data for the instruction. The address in the memory
location is determined by the following:
(a) Operand I is used as the low-order byte of an
(b) Index Register Y is added to the address above.
ADC, AND, CMP, EOR, LDA, LDX, ORA, SBC, STA
Mnemonics
address, Operand II as the high-order byte.
The result is the address in the memory location.
16
∆ ∆ ∆ ∆ ∆ ADC∆ ∆ ∆ ∆ ∆ $AD12, Y
Absolute Y
Operand II (AD
Operand I (12
Op-code (79
Data(XX
Memory
16
16
)
16
16
)
)
)
AE00
Contents of Index Register Y
+ EE
79
Machine code
16
16
16
12
= AE00
16
designation
Absolute Y
Addressing mode
AD
16
16

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