M37632EFFP#U2 Renesas Electronics America, M37632EFFP#U2 Datasheet - Page 26

• Manufacturer Part Number: M37632EFFP#U2
• Description: IC 740 MCU 80QFP
• Manufacturer: Renesas Electronics America

Specifications of M37632EFFP#U2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INSTRUCTIONS
Rev.2.00 Nov 14, 2006
REJ09B0322-0200
Addressing mode :
Instructions :
Function :
Example :
(A) ← (A) + (C) + XX
Assuming that “01
page 18 of 185
Indirect Y
Specifies the contents in a memory location as the
data for the instruction. The address in the memory
location is determined by the following:
(a) The Operand is used the low-order byte of an
(b) The contents of the address in the Zero Page
(c) The Index Register Y is added to the address in
ADC, AND, CMP, EOR, LDA, ORA, SBC, STA
Mnemonic
designation
Zero page
indirect
16
address in the Zero Page memory location and
00
memory location is used as the low-order byte of
an address. The next Zero Page memory location
is used as the high-order byte.
Step b. The result of this addition is the address
in the memory location.
16
∆ ∆ ∆ ∆ ∆ ADC∆ ∆ ∆ ∆ ∆ ($1E),Y
” for Data I, and “12
16
Indirect Y
of the high-order byte.
Operand (1E
Op-code (71
Data II (12
Data I (01
Data (XX
Zero page
Memory
16
” for Data ll are stored in advance.
16
16
16
16
16
)
)
)
)
)
12E7
1F
1E
00
FF
16
16
16
16
16
1201
Contents of Index Register Y
Machine code
16
+ E6
71
16
16
= 12E7
designation
Absolute Y
Addressing mode
1E
16
16