UPD70F3745GJ-GAE-AX Renesas Electronics America, UPD70F3745GJ-GAE-AX Datasheet - Page 296

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UPD70F3745GJ-GAE-AX

Manufacturer Part Number
UPD70F3745GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3745GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
60K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD70F3745GJ-GAE-AX
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V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Note The TPnOVF0 and TPnOVF1 flags are set on the internal RAM by software.
<1> Read the TPnCCR0 register (setting of the default value of the TIPn0 pin input).
<2> Read the TPnCCR1 register (setting of the default value of the TIPn1 pin input).
<3> An overflow occurs. Nothing is done by software.
<4> Read the TPnCCR0 register.
<5> Read the TPnCCR1 register.
<6> Same as <3>
Read the overflow flag. If the overflow flag is 1, set only the TPnOVF1 flag to 1, and clear the overflow
flag to 0.
Because the overflow flag is 1, the pulse width can be calculated by (10000H + D
Read the overflow flag. Because the overflow flag is cleared in <4>, 0 is read.
Read the TPnOVF1 flag. If the TPnOVF1 flag is 1, clear it to 0.
Because the TPnOVF1 flag is 1, the pulse width can be calculated by (10000H + D
TPnCCR0 register
TPnCCR1 register
Example when two capture registers are used (without using overflow interrupt)
INTTPnOV signal
TPnOVF0 flag
TPnOVF1 flag
TIPn0 pin input
TIPn1 pin input
16-bit counter
TPnOVF bit
TPnCE bit
FFFFH
0000H
Note
Note
D
00
<1>
D
10
CHAPTRER 7 16-bit TIMER/EVENT COUNTER P (TMP)
<2>
D
00
<3>
D
D
01
10
<4>
D
11
<5> <6>
D
01
D
11
01
11
− D
− D
00
10
).
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) (correct).
(2/2)

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