UPD70F3745GJ-GAE-AX Renesas Electronics America, UPD70F3745GJ-GAE-AX Datasheet - Page 625

• Manufacturer Part Number: UPD70F3745GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3745GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 128
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 60K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
The communication reservation timing is shown below.
Remarks 1. n = 0 to 2
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
/2 (when OCKSm = 10H set)
/3 (when OCKSm = 11H set)
/4 (when OCKSm = 12H set)
/5 (when OCKSm = 13H set)
/2 (when OCKSm = 10H set)
/3 (when OCKSm = 11H set)
/4 (when OCKSm = 12H set)
/5 (when OCKSm = 13H set)
/2 (when OCKSm = 10H set)
/3 (when OCKSm = 11H set)
/4 (when OCKSm = 12H set)
/5 (when OCKSm = 13H set)
/2 (when OCKSm = 10H set)
/3 (when OCKSm = 11H set)
/4 (when OCKSm = 12H set)
/5 (when OCKSm = 13H set)
/2 (when OCKSm = 10H set)
/3 (when OCKSm = 11H set)
/4 (when OCKSm = 12H set)
/5 (when OCKSm = 13H set)
/2 (when OCKSm = 10H set)
/3 (when OCKSm = 11H set)
/4 (when OCKSm = 12H set)
/5 (when OCKSm = 13H set)
(when OCKSm = 18H set)
(when OCKSm = 18H set)
(when OCKSm = 18H set)
(when OCKSm = 18H set)
(when OCKSm = 18H set)
(when OCKSm = 18H set)
2. × = don't care
Clock Selection
m = 0, 1
CLXn
Table 17-6. Wait Periods
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
SMCn
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CLn1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
CLn0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
1
×
×
×
×
×
0
1
1
1
1
1
×
×
×
×
×
0
26 clocks
52 clocks
78 clocks
104 clocks
130 clocks
47 clocks
94 clocks
141 clocks
188 clocks
235 clocks
47 clocks
37 clocks
74 clocks
111 clocks
148 clocks
185 clocks
16 clocks
32 clocks
48 clocks
64 clocks
80 clocks
16 clocks
13 clocks
26 clocks
39 clocks
52 clocks
65 clocks
10 clocks
20 clocks
30 clocks
40 clocks
50 clocks
10 clocks
Wait Period
CHAPTER 17 I
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C BUS