PIC16C65A/JW Microchip Technology, PIC16C65A/JW Datasheet - Page 67
![IC MCU EPROM 4KX14 PWM 40CDIP](/photos/6/63/66338/150-40-cdip_sml.jpg)
PIC16C65A/JW
Manufacturer Part Number
PIC16C65A/JW
Description
IC MCU EPROM 4KX14 PWM 40CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16LC62A-04SP.pdf
(337 pages)
4.PIC16C65A-20P.pdf
(8 pages)
5.PIC16C65A-20P.pdf
(4 pages)
Specifications of PIC16C65A/JW
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
EPROM, UV
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-CDIP (0.600", 15.24mm) Window
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
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- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16LC62A-04SP PDF datasheet #3
- PIC16C65A-20P PDF datasheet #4
- PIC16C65A-20P PDF datasheet #5
- Current page: 67 of 337
- Download datasheet (3Mb)
7.2
When an external clock input is used for Timer0, it must
meet certain requirements. The requirements ensure
the external clock can be synchronized with the internal
phase clock (T
incrementing of Timer0 after synchronization.
7.2.1
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI with the internal phase clocks is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks (Figure 7-5).
Therefore, it is necessary for T0CKI to be high for at
least 2Tosc (and a small RC delay of 20 ns) and low for
at least 2Tosc (and a small RC delay of 20 ns). Refer to
the electrical specification of the desired device.
FIGURE 7-5:
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
1997 Microchip Technology Inc.
Note 1: Delay from clock input change to Timer0 increment is 3Tosc to 7Tosc. (Duration of Q = Tosc).
Using Timer0 with External Clock
EXTERNAL CLOCK SYNCHRONIZATION
2: External clock if no prescaler selected, prescaler output otherwise.
3: The arrows indicate the points in time where sampling occurs.
External Clock/Prescaler
Output after sampling
External Clock Input or
Prescaler output
Therefore, the error in measuring the interval between two edges on Timer0 input = 4Tosc max.
Increment Timer0 (Q4)
OSC
TIMER0 TIMING WITH EXTERNAL CLOCK
). Also, there is a delay in the actual
(2)
Timer0
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
(3)
(1)
T0
When a prescaler is used, the external clock input is
divided by the asynchronous ripple-counter type pres-
caler so that the prescaler output is symmetrical. For
the external clock to meet the sampling requirement,
the ripple-counter must be taken into account. There-
fore, it is necessary for T0CKI to have a period of at
least 4Tosc (and a small RC delay of 40 ns) divided by
the prescaler value. The only requirement on T0CKI
high and low time is that they do not violate the mini-
mum pulse width requirement of 10 ns. Refer to param-
eters 40, 41 and 42 in the electrical specification of the
desired device.
7.2.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0 mod-
ule is actually incremented. Figure 7-5 shows the delay
from the external clock edge to the timer incrementing.
TIMER0 INCREMENT DELAY
T0 + 1
PIC16C6X
T0 + 2
Small pulse
misses sampling
DS30234D-page 67
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