PIC16C554-04E/SO Microchip Technology, PIC16C554-04E/SO Datasheet - Page 15

• Manufacturer Part Number: PIC16C554-04E/SO
• Description: IC MCU OTP 512X14 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C554-04E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Size: 896B (512 x 14)
• Program Memory Type: OTP
• Ram Size: 80 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

4.0
4.1
The PIC16C55X has a 13-bit program counter capable
of addressing an 8 K x 14 program memory space.
Only the first 512 x 14 (0000h - 01FFh) for the
PIC16C554 and 2K x 14 (0000h - 07FFh) for the
PIC16C557 and PIC16C558 are physically imple-
mented. Accessing a location above these boundaries
will cause a wrap-around within the first 512 x 14
spaces in the PIC16C554, or 2K x 14 space of the
PIC16C558 and PIC16C557. The RESET vector is at
0000h and the interrupt vector is at 0004h (Figure 4-1,
Figure 4-2).
FIGURE 4-1:
 2002 Microchip Technology Inc.
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
On-chip Program
Stack Level 1
Stack Level 8
RESET Vector
Interrupt Vector
Stack Level 2
PC<12:0>
Memory
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16C554
13
000h
0004
0005
01FFh
0200h
1FFFh
Preliminary
FIGURE 4-2:
4.2
The data memory (Figure 4-3 through Figure 4-5) is
partitioned into two banks which contain the General
Purpose Registers (GPR) and the Special Function
Registers (SFR). Bank 0 is selected when the RP0 bit
(STATUS <5>) is cleared. Bank 1 is selected when the
RP0 bit is set. The Special Function Registers are
located in the first 32 locations of each Bank. Register
locations 20-6Fh (Bank 0) on the PIC16C554 and 20-
7Fh (Bank 0) and A0-BFh (Bank 1) on the PIC16C558
and PIC16C557 are General Purpose Registers imple-
mented as static RAM. Some special purpose registers
are mapped in Bank 1.
4.2.1
The register file is organized as 80 x 8 in the
PIC16C554 and 128 x 8 in the PIC16C557 and
PIC16C558. Each can be accessed either directly or
indirectly through the File Select Register, FSR
(Section 4.4).
CALL, RETURN
RETFIE, RETLW
Data Memory Organization
GENERAL PURPOSE REGISTER
FILE
On-chip Program
Stack Level 1
Stack Level 8
RESET Vector
Interrupt Vector
Stack Level 2
PC<12:0>
Memory
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16C557 AND
PIC16C558
PIC16C55X
13
DS40143D-page 13
000h
0004
0005
07FFh
0800h
1FFFh